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公开(公告)号:US11881509B2
公开(公告)日:2024-01-23
申请号:US17396942
申请日:2021-08-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junbeom Park , Sangmo Koo , Minyi Kim , Seokhyeon Yoon
CPC classification number: H01L29/0847 , H01L29/1033 , H01L29/66553
Abstract: The semiconductor device may include an active pattern provided on a substrate and a source/drain pattern on the active pattern. The source/drain pattern may include a bottom surface in contact with a top surface of the active pattern. The semiconductor device may further include a channel pattern connected to the source/drain pattern, a gate electrode extended to cross the channel pattern, and a fence insulating layer extended from a side surface of the active pattern to a lower side surface of the source/drain pattern. A pair of middle insulating patterns may be at both sides of the bottom surface of the source/drain pattern and between the active pattern and the source/drain pattern in contact with an inner side surface of the fence insulating layer.