公开(公告)号：US10032886B2

公开(公告)日：2018-07-24

申请号：US15170230

申请日：2016-06-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Yup Chung ,  Hyun-Jo Kim ,  Seong-Yul Park ,  Se-Wan Park ,  Jong-Mil Youn ,  Jeong-Hyo Lee ,  Hwa-Sung Rhee ,  Hee-Don Jeong ,  Ji-Yong Ha

IPC: H01L21/02 ,  H01L29/66 ,  H01L27/092 ,  H01L29/08 ,  H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/165

Abstract: A semiconductor device includes a fin-type pattern including a first short side and a second short side opposed to each other, a first trench in contact with the first short side, a second trench in contact with the second short side, a first field insulating film in the first trench, the first field insulating film including a first portion and a second portion arranged sequentially from the first short side, and a height of the first portion being different from a height of the second portion, a second field insulating film in the second trench, and a first dummy gate on the first portion of the first field insulating film.

公开(公告)号：US20210175127A1

公开(公告)日：2021-06-10

申请号：US16936893

申请日：2020-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Yul Park ,  Myoung-Ho Kang ,  Hyungkwan Park

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L21/02 ,  H01L21/285 ,  H01L21/306 ,  H01L21/308 ,  H01L29/66 ,  G06F30/392 ,  G03F1/36

Abstract: A method of fabricating a semiconductor device includes: (i) placing, on a first layout, first patterns that extend parallel to each other in a first direction and are spaced apart from each other in a second direction intersecting the first direction, (ii) extracting a low-density region on the first layout, (iii) defining an enclosure region that surrounds the first patterns, (iv) placing dot patterns on a second layout, (v) extracting, from the dot patterns, first dot patterns that overlap the low-density region and do not overlap the enclosure region, (vi) placing the extracted first dot patterns on the first layout, (vii) allowing the first dot patterns to extend in the first direction to form second patterns, and (viii) using the first and second patterns to respectively form first and second active patterns on a substrate.

公开(公告)号：US11205595B2

公开(公告)日：2021-12-21

申请号：US16936893

申请日：2020-07-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong-Yul Park ,  Myoung-Ho Kang ,  Hyungkwan Park

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L21/02 ,  H01L21/285 ,  H01L21/306 ,  H01L21/308 ,  H01L29/66 ,  G06F30/392 ,  G03F1/36

Abstract: A method of fabricating a semiconductor device includes: (i) placing, on a first layout, first patterns that extend parallel to each other in a first direction and are spaced apart from each other in a second direction intersecting the first direction, (ii) extracting a low-density region on the first layout, (iii) defining an enclosure region that surrounds the first patterns, (iv) placing dot patterns on a second layout, (v) extracting, from the dot patterns, first dot patterns that overlap the low-density region and do not overlap the enclosure region, (vi) placing the extracted first dot patterns on the first layout, (vii) allowing the first dot patterns to extend in the first direction to form second patterns, and (viii) using the first and second patterns to respectively form first and second active patterns on a substrate.

公开(公告)号：US12068327B2

公开(公告)日：2024-08-20

申请号：US17454303

申请日：2021-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myoung-Ho Kang ,  Yong-Ah Kim ,  Dong Hyo Park ,  Seong-Yul Park ,  Chang Hyeon Lee

IPC: H01L27/12 ,  G03F7/00 ,  G03F7/20 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L27/1222 ,  G03F7/70441 ,  H01L29/41775 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate including a first region, a second region, and a connecting region placed between the first region and the second region, a plurality of first multi-channel active patterns placed in the first region of the substrate, a plurality of second multi-channel active patterns placed in the second region of the substrate, a first connecting fin type pattern which is placed in the connecting region of the substrate and extends from the first region to the second region in a first direction, and a field insulating film which is placed on the substrate and covers an upper surface of the first connecting fin type pattern, wherein a width of the first connecting fin type pattern in a second direction decreases and then increases as it goes away from the first region, and the first direction is perpendicular to the second direction.

公开(公告)号：US09557637B2

公开(公告)日：2017-01-31

申请号：US14449377

申请日：2014-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-Won Jeon ,  Ji-Youn Song ,  Mun-Su Shin ,  Seong-Yul Park ,  Suk-Joo Lee

IPC: G06F17/50 ,  G03F1/36 ,  G03F1/70 ,  G03F7/20

CPC classification number: G03F1/36 ,  G03F1/70 ,  G03F7/70433

Abstract: A method of designing patterns of semiconductor devices includes forming a plurality of tiles having patterns on a wafer, measuring the patterns of the plurality of tiles, analyzing the measurements of the patterns and determining a tile having such a size that the measurements linearly vary according to a design size and pattern density, and modifying the pattern density of the determined tile.

Abstract translation: 一种设计半导体器件图形的方法包括：在晶片上形成具有图案的多个瓦片，测量多个瓦片的图案，分析图案的测量结果，以及确定具有这样的尺寸的瓦片，使得测量值根据 设计尺寸和图案密度，以及修改确定的瓷砖的图案密度。