Semiconductor device
    1.
    发明授权

    公开(公告)号:US11581367B2

    公开(公告)日:2023-02-14

    申请号:US17209660

    申请日:2021-03-23

    Abstract: A semiconductor device includes a semiconductor substrate, a peripheral device on the semiconductor substrate, a lower insulating structure on the semiconductor substrate and covering the peripheral device, a first conductive line on the lower insulating structure, a memory cell structure on the first conductive line, and a second conductive line on the memory cell structure. The memory cell structure may include an information storage material pattern and a selector material pattern on the lower insulating structure in a vertical direction. The selector material pattern may include a first selector material layer including a first material and a second selector material layer including a second material. The second selector material layer may have a threshold voltage drift higher than that of the first material. The second selector material layer may have a second width narrower than a first width of the first selector material layer.

    Resistive memory devices
    3.
    发明授权

    公开(公告)号:US11812619B2

    公开(公告)日:2023-11-07

    申请号:US17227852

    申请日:2021-04-12

    CPC classification number: H10B63/84 H10N70/826 H10N70/841

    Abstract: A resistive memory device includes a first conductive line extending in a first horizontal direction on a substrate, a plurality of second conductive lines separated from the first conductive line in a vertical direction and extending in a second horizontal direction intersecting with the first horizontal direction, on the substrate, a plurality of memory cells respectively connected between the first conductive line and one second conductive line selected from among the plurality of second conductive lines at a plurality of intersection points between the first conductive line and the plurality of second conductive lines, each of the plurality of memory cells including a selection device and a resistive memory pattern, and a bottom electrode shared by the plurality of memory cells, the bottom electrode having a variable thickness in the first horizontal direction, and including a top surface having a concave-convex shape.

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