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    Semiconductor devices having multiple barrier patterns
    2.
    发明授权
    Semiconductor devices having multiple barrier patterns 有权

    公开(公告)号：US11610975B2

    公开(公告)日：2023-03-21

    申请号：US17470102

    申请日：2021-09-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongho Park ,  Byounghoon Lee ,  Seungkeun Cha ,  Wandon Kim

    IPC: H01L29/06 ,  H01L29/49 ,  H01L29/45 ,  H01L29/423 ,  H01L29/10

    Abstract: Semiconductor devices are provided. A semiconductor device includes a first active pattern on a first region of a substrate, a pair of first source/drain patterns on the first active pattern, a first channel pattern between the pair of first source/drain patterns, and a gate electrode that extends across the first channel pattern. The gate electrode is on an uppermost surface and at least one sidewall of the first channel pattern. The gate electrode includes a first metal pattern including a p-type work function metal, a second metal pattern on the first metal pattern and including an n-type work function metal, a first barrier pattern on the second metal pattern and including an amorphous metal layer that includes tungsten (W), carbon (C), and nitrogen (N), and a second barrier pattern on the first barrier pattern. The second barrier pattern includes the p-type work function metal.

    SEMICONDUCTOR DEVICES HAVING MULTIPLE BARRIER PATTERNS
    4.
    发明申请
    SEMICONDUCTOR DEVICES HAVING MULTIPLE BARRIER PATTERNS 有权

    公开(公告)号：US20210028291A1

    公开(公告)日：2021-01-28

    申请号：US16886881

    申请日：2020-05-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongho Park ,  Byounghoon Lee ,  Seungkeun Cha ,  Wandon Kim

    IPC: H01L29/49 ,  H01L29/45 ,  H01L29/10 ,  H01L29/423 ,  H01L29/06

    Abstract: Semiconductor devices are provided. A semiconductor device includes a first active pattern on a first region of a substrate, a pair of first source/drain patterns on the first active pattern, a first channel pattern between the pair of first source/drain patterns, and a gate electrode that extends across the first channel pattern. The gate electrode is on an uppermost surface and at least one sidewall of the first channel pattern. The gate electrode includes a first metal pattern including a p-type work function metal, a second metal pattern on the first metal pattern and including an n-type work function metal, a first barrier pattern on the second metal pattern and including an amorphous metal layer that includes tungsten (W), carbon (C), and nitrogen (N), and a second barrier pattern on the first barrier pattern. The second barrier pattern includes the p-type work function metal.

    Semiconductor devices having multiple barrier patterns
    5.
    发明授权
    Semiconductor devices having multiple barrier patterns 有权

    公开(公告)号：US11145738B2

    公开(公告)日：2021-10-12

    申请号：US16886881

    申请日：2020-05-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongho Park ,  Byounghoon Lee ,  Seungkeun Cha ,  Wandon Kim

    IPC: H01L29/49 ,  H01L29/45 ,  H01L29/06 ,  H01L29/423 ,  H01L29/10

    Abstract: Semiconductor devices are provided. A semiconductor device includes a first active pattern on a first region of a substrate, a pair of first source/drain patterns on the first active pattern, a first channel pattern between the pair of first source/drain patterns, and a gate electrode that extends across the first channel pattern. The gate electrode is on an uppermost surface and at least one sidewall of the first channel pattern. The gate electrode includes a first metal pattern including a p-type work function metal, a second metal pattern on the first metal pattern and including an n-type work function metal, a first barrier pattern on the second metal pattern and including an amorphous metal layer that includes tungsten (W), carbon (C), and nitrogen (N), and a second barrier pattern on the first barrier pattern. The second barrier pattern includes the p-type work function metal.

    SEMICONDUCTOR DEVICES HAVING MULTIPLE BARRIER PATTERNS
    9.
    发明申请
    SEMICONDUCTOR DEVICES HAVING MULTIPLE BARRIER PATTERNS 有权

    公开(公告)号：US20210408260A1

    公开(公告)日：2021-12-30

    申请号：US17470102

    申请日：2021-09-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jongho Park ,  Byounghoon Lee ,  Seungkeun Cha ,  Wandon Kim

    IPC: H01L29/49 ,  H01L29/45 ,  H01L29/06 ,  H01L29/423 ,  H01L29/10

    Abstract: Semiconductor devices are provided. A semiconductor device includes a first active pattern on a first region of a substrate, a pair of first source/drain patterns on the first active pattern, a first channel pattern between the pair of first source/drain patterns, and a gate electrode that extends across the first channel pattern. The gate electrode is on an uppermost surface and at least one sidewall of the first channel pattern. The gate electrode includes a first metal pattern including a p-type work function metal, a second metal pattern on the first metal pattern and including an n-type work function metal, a first barrier pattern on the second metal pattern and including an amorphous metal layer that includes tungsten (W), carbon (C), and nitrogen (N), and a second barrier pattern on the first barrier pattern. The second barrier pattern includes the p-type work function metal.

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