公开(公告)号：US20220149040A1

公开(公告)日：2022-05-12

申请号：US17584877

申请日：2022-01-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungryul LEE ,  Yongseung KIM ,  Jungtaek KIM ,  Pankwi PARK ,  Dongchan SUH ,  Moonseung YANG ,  Seojin JEONG ,  Minhee CHOI ,  Ryong HA

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06

Abstract: An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.

公开(公告)号：US20210082914A1

公开(公告)日：2021-03-18

申请号：US16841806

申请日：2020-04-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungryul LEE ,  Yongseung KIM ,  Jungtaek KIM ,  Pankwi PARK ,  Dongchan SUH ,  Moonseung YANG ,  Seojin JEONG ,  Minhee CHOI ,  Ryong HA

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/423

Abstract: An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.