公开(公告)号：US20240121963A1

公开(公告)日：2024-04-11

申请号：US18474307

申请日：2023-09-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： So Hyun Lee ,  Kang-Oh Yun ,  Dong Jin Lee ,  Jun Hee Lim

IPC: H10B43/40 ,  H10B43/27

CPC classification number: H10B43/40 ,  H10B43/27

Abstract: A semiconductor memory device includes: a substrate including a first region and a second region, the first region includes a peripheral circuit and a first active region (FAR), and the second region includes memory cell blocks. The FAR includes a FAR first extension extending in a first direction, a FAR second extension extending in a second direction, and a FAR third extension extending in a third direction. The FAR first extension, the FAR second extension, and the FAR third extension form an angle greater than 90 degrees relative to one another. The device includes a first pass transistor circuit configured to transmit driving signals, and the first pass transistor circuit includes a FAR first gate structure on the FAR first extension, a FAR second gate structure on the FAR second extension, a FAR third gate structure on the FAR third extension, and a first shared source/drain.

公开(公告)号：US12279426B2

公开(公告)日：2025-04-15

申请号：US17468917

申请日：2021-09-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： So Hyun Lee ,  Kang-Oh Yun

IPC: H10B41/35 ,  G11C5/06 ,  H01L29/06 ,  H10B41/10 ,  H10B41/27 ,  H10B41/40

Abstract: A semiconductor device includes a first active region and a second active region arranged along a first direction in a substrate, an element isolation layer extending in a second direction in the substrate to isolate the first active region and the second active region, a first gate electrode extending in the first direction on the first active region, a second gate electrode extending in the first direction on the second active region, and an isolation impurity region containing impurities of a first conductivity type in the substrate and disposed below the element isolation layer, in which the isolation impurity region includes a first isolation region and a second isolation region spaced apart from each other in the second direction, and at least a part of the substrate interposed between the first gate electrode and the second gate electrode is interposed between the first isolation region and the second isolation region.

公开(公告)号：US20220208779A1

公开(公告)日：2022-06-30

申请号：US17468917

申请日：2021-09-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： So Hyun Lee ,  Kang-Oh Yun

IPC: H01L27/11524 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11526 ,  G11C5/06 ,  H01L29/06

Abstract: A semiconductor device includes a first active region and a second active region arranged along a first direction in a substrate, an element isolation layer extending in a second direction in the substrate to isolate the first active region and the second active region, a first gate electrode extending in the first direction on the first active region, a second gate electrode extending in the first direction on the second active region, and an isolation impurity region containing impurities of a first conductivity type in the substrate and disposed below the element isolation layer, in which the isolation impurity region includes a first isolation region and a second isolation region spaced apart from each other in the second direction, and at least a part of the substrate interposed between the first gate electrode and the second gate electrode is interposed between the first isolation region and the second isolation region.