公开(公告)号：US09425208B2

公开(公告)日：2016-08-23

申请号：US14682567

申请日：2015-04-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hong-Soo Kim ,  Sung-Hoi Hur ,  So-Wi Chin

IPC: H01L29/66 ,  H01L27/115 ,  H01L29/423

CPC classification number: H01L27/11582 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L29/42356 ,  H01L29/78 ,  H01L29/7827

Abstract: A vertical memory device includes a substrate including a cell region and a peripheral circuit region, the peripheral circuit region including a gate structure comprising a transistor, a plurality of channels on the cell region, each of the channels extending in a first direction that is vertical with respect to a top surface of the substrate, a plurality of gate lines stacked in the first direction and spaced apart from each other, the gate lines surrounding outer sidewalls of the channels, and a blocking structure between the cell region and the peripheral circuit region, wherein a height of the blocking structure is greater than a height of the gate structure in the peripheral region.

Abstract translation: 一种垂直存储装置，包括：包括单元区域和外围电路区域的基板，所述外围电路区域包括栅极结构，所述栅极结构包括晶体管，所述单元区域上的多个沟道，每个所述沟道沿垂直于第一方向延伸 相对于衬底的顶表面，沿着第一方向堆叠并且彼此间隔开的多个栅极线，围绕沟道的外侧壁的栅极线以及电池区域和外围电路区域之间的阻挡结构 ，其中所述阻挡结构的高度大于所述外围区域中的所述栅极结构的高度。