公开(公告)号：US20250008747A1

公开(公告)日：2025-01-02

申请号：US18537013

申请日：2023-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suhyun Bang ,  Seulji Song ,  Youngsun Song

IPC: H10B63/00 ,  G11C5/06 ,  H10N70/00

Abstract: A three-dimensional memory device includes a base insulating layer on a substrate, a stack structure including word lines and first interlayer insulating layers which are alternately stacked on the base insulating layer, and a second interlayer insulating layer on an uppermost one of the word lines, bit lines that are in the stack structure and spaced apart from each other in a first direction parallel to a top surface of the substrate, each bit line including a first portion that protrudes from a top surface of the stack structure and a second portion that are in the stack structure, an outer electrode on the stack structure and on the first portions of the bit lines, and a dielectric layer between the outer electrode and the first portion of the bit line and surrounding a side surface of the first portion of the bit line in plan view.

公开(公告)号：US20250120116A1

公开(公告)日：2025-04-10

申请号：US18636661

申请日：2024-04-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suhyun Bang ,  Seulji Song

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H10B12/00 ,  H10B61/00 ,  H10B63/10

Abstract: A vertical semiconductor switching device includes lower and upper conductive patterns, and an active pattern electrically connected between the lower conductive pattern and the upper conductive pattern. The active pattern includes a lower source/drain (S/D) region electrically coupled to the lower conductive pattern, an upper S/D region electrically coupled to the upper conductive pattern, and a channel region having first impurities of a first conductivity type therein, electrically connected to the lower source/drain region and to the upper source/drain region. The channel region includes a lower channel region, an intermediate channel region on the lower channel region, and an upper channel region on the intermediate channel region. A gate electrode is provided on a side surface of the channel region.

公开(公告)号：US20250157934A1

公开(公告)日：2025-05-15

申请号：US18918467

申请日：2024-10-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suhyun Bang ,  Seulji Song ,  Hwayeong Lee

IPC: H01L23/532 ,  H10B12/00

Abstract: A semiconductor device includes a bit line above a substrate and extending in a first horizontal direction, a word line at a higher vertical level than the bit line and extending in a second horizontal direction crossing the first horizontal direction, a fluorine-containing insulating layer spaced apart from the word line and extending in the second horizontal direction, and a channel layer between the word line and the fluorine-containing insulating layer, the channel layer including a first side surface and a second side surface opposite to the first side surface. The first side surface faces the word line, and the channel layer includes an oxide semiconductor and fluorine.