公开(公告)号：US10256237B2

公开(公告)日：2019-04-09

申请号：US15656377

申请日：2017-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-han Lee ,  Sun-ghil Lee ,  Myung-il Kang ,  Jeong-yun Lee ,  Seung-hun Lee ,  Hyun-jung Lee ,  Sun-wook Kim

IPC: H01L27/088 ,  H01L27/11 ,  H01L29/06

Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.

公开(公告)号：US10566331B1

公开(公告)日：2020-02-18

申请号：US16257913

申请日：2019-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-gil Yang ,  Sang-su Kim ,  Sun-wook Kim ,  Geum-jong Bae ,  Seung-min Song ,  Soo-jin Jeong

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8238 ,  H01L21/02

Abstract: A semiconductor device includes: a fin-type active area extending in a first direction protruding from a substrate; a plurality of nanosheet stacked structures; a blocking film covering a part of the upper surface and one sidewall of each of a pair of nanosheet stacked structures adjacent to both sides of the fin-type active area among the plurality of nanosheet stacked structures; a gate electrode extending in a second direction intersecting the first direction on the fin-type active area, the gate electrode including a real gate electrode surrounding the plurality of nanosheets and a dummy gate electrode disposed on the blocking film; and a gate dielectric layer between the real gate electrode and the plurality of nanosheets and between the dummy gate electrode and the blocking film.

公开(公告)号：US11011516B2

公开(公告)日：2021-05-18

申请号：US16705799

申请日：2019-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-han Lee ,  Sun-ghil Lee ,  Myung-il Kang ,  Jeong-yun Lee ,  Seung-hun Lee ,  Hyun-jung Lee ,  Sun-wook Kim

IPC: H01L27/088 ,  H01L27/11 ,  H01L29/06 ,  H01L27/02 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/66

Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.

公开(公告)号：US10559565B2

公开(公告)日：2020-02-11

申请号：US16288727

申请日：2019-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-han Lee ,  Sun-ghil Lee ,  Myung-il Kang ,  Jeong-yun Lee ,  Seung-hun Lee ,  Hyun-jung Lee ,  Sun-wook Kim

IPC: H01L27/088 ,  H01L27/11 ,  H01L29/06 ,  H01L21/8234 ,  H01L27/02

Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.

公开(公告)号：US20180182756A1

公开(公告)日：2018-06-28

申请号：US15656377

申请日：2017-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-han LEE ,  Sun-ghil Lee ,  Myung-il Kang ,  Jeong-yun Lee ,  Seung-hun Lee ,  Hyun-jung Lee ,  Sun-wook Kim

IPC: H01L27/088 ,  H01L29/06 ,  H01L27/11

CPC classification number: H01L27/0886 ,  H01L21/823418 ,  H01L27/0207 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0649

Abstract: An integrated circuit (IC) device includes a first and a second fin-type active region protruding from a first region and a second region, respectively, of a substrate, a first and a second gate line, and a first and a second source/drain region. The first fin-type active region has a first top surface and a first recess has a first depth from the first top surface. The first source/drain region fills the first recess and has a first width. The second fin-type active region has a second top surface and a second recess has a second depth from the second top surface. The second depth is greater than the first depth. The second source/drain region fills the second recess and has a second width. The second width is greater than the first width.