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公开(公告)号:US11200117B2
公开(公告)日:2021-12-14
申请号:US17029912
申请日:2020-09-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myung Kyu Lee , Jun Jin Kong , Ki Jun Lee , Sung Hye Cho , Dae Hyun Kim , Yong Gyu Chu
Abstract: Disclosed are a semiconductor memory device, a controller, a memory system, and an operation method thereof. The semiconductor memory device includes a memory cell array including a plurality of memory cells, and an error correcting code (ECC) decoder configured to receive first data and a parity output from selected memory cells of the memory cell array. The ECC decoder generates a syndrome based on the first data and the parity, generates a decoding status flag (DSF) indicating a type of an error of the first data by the syndrome, and outputs the second data and the DSF to an external device outside of the semiconductor memory device when a read operation of the semiconductor memory device is performed.
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公开(公告)号:US10824507B2
公开(公告)日:2020-11-03
申请号:US16372047
申请日:2019-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Myung Kyu Lee , Jun Jin Kong , Ki Jun Lee , Sung Hye Cho , Dae Hyun Kim , Yong Gyu Chu
Abstract: Disclosed are a semiconductor memory device, a controller, and a memory system. The semiconductor memory device includes a memory cell array including a plurality of memory cells, and an error correcting code (ECC) decoder configured to receive first data and a parity output from selected memory cells of the memory cell array. The ECC decoder generates a syndrome based on the first data and the parity, generates a decoding status flag (DSF) indicating a type of an error of the first data by the syndrome, and outputs the second data and the DSF to an external device outside of the semiconductor memory device when a read operation of the semiconductor memory device is performed.
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