公开(公告)号：US20230244136A1

公开(公告)日：2023-08-03

申请号：US17963263

申请日：2022-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Yong MOON ,  Won-Chan LEE

IPC: G03F1/36

CPC classification number: G03F1/36

Abstract: A method for fabricating a photomask layout is provided. The method includes: receiving a first layout including a main pattern; generating a second layout by generating an assist feature in consideration of optical properties of the main pattern in the first layout; generating a third layout by performing optical proximity correction (OPC) on a second layout; and outputting the third layout to a corrected layout when the assist feature is not generated on an ACI image of a semiconductor film etched by using a photomask generated using the third layout, as an etching mask.

公开(公告)号：US20240321580A1

公开(公告)日：2024-09-26

申请号：US18526038

申请日：2023-12-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Jin PARK ,  Sung-Yong MOON ,  Jun Young JANG

IPC: H01L21/027 ,  G03F1/70 ,  G03F1/82 ,  H01L21/8234

CPC classification number: H01L21/0274 ,  G03F1/70 ,  G03F1/82 ,  H01L21/823431

Abstract: A photomask manufacturing method includes defining a main region and a dummy region based on a layout data, wherein the main region corresponds to an outer boundary surrounding functional patterns defined by the layout data and the dummy region corresponds to an empty space outside the main region, and forming a dummy pattern to fill the dummy region. The forming of the dummy pattern includes placing at least one first pattern block in the dummy region to form a first sub-region, each of the at least one first pattern block having a first area, and placing, after completing the placing of the at least one first pattern block in the dummy region, at least one second pattern block in the dummy region except the first sub-region to form a second sub-region, each of the at least one second pattern block having a second area smaller than the first area.

公开(公告)号：US20190155169A1

公开(公告)日：2019-05-23

申请号：US16030061

申请日：2018-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Yong MOON ,  SOORYONG LEE ,  CHANGHWAN KIM

IPC: G03F7/20

Abstract: A method for correcting a mask layout includes providing a mask layout including first patterns, each of the first patterns having a size related to a first critical dimension (CD) value, obtaining topography data on a region of a wafer, generating a defocus map using the topography data, and correcting the mask layout on the basis of the defocus map. The generating of the defocus map includes respectively setting second CD values for a plurality of sub-regions of the mask layout. The second CD values may be set based on the topography data. The correcting of the mask layout on the basis of the defocus map comprises correcting the sizes of the first patterns to be related to the second CD values.