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    SEMICONDUCTOR PACKAGE
    1.
    发明公开
    SEMICONDUCTOR PACKAGE 审中-公开

    公开(公告)号：US20240222348A1

    公开(公告)日：2024-07-04

    申请号：US18238099

    申请日：2023-08-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seunggeol RYU ,  TAEHWAN KIM ,  SHLE-GE LEE

    IPC: H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/065 ,  H10B80/00

    CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L23/5385 ,  H01L24/48 ,  H01L25/0652 ,  H10B80/00 ,  H01L2224/48091 ,  H01L2224/48227

    Abstract: A semiconductor package may include a first package including a first substrate, a first semiconductor chip mounted on the first substrate, and a second substrate on the first semiconductor chip, the first package having a center region, a first edge region surrounding the center region, and a second edge region surrounding the first edge region in a plan view, dummy balls disposed on the center region and the second edge region of the first package, connection terminals disposed on the first edge region of the first package, and a second package including a third substrate disposed on the dummy balls and the connection terminals and a second semiconductor chip mounted on the third substrate. The dummy balls may be in contact with the second substrate and may be spaced apart from the third substrate, and the connection terminals may be coupled to the second and third substrates.

    SEMICONDUCTOR PACKAGE AND COOLING SYSTEM
    2.
    发明申请
    SEMICONDUCTOR PACKAGE AND COOLING SYSTEM 有权

    公开(公告)号：US20230124783A1

    公开(公告)日：2023-04-20

    申请号：US17961371

    申请日：2022-10-06

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： JAECHOON KIM ,  TAEHWAN KIM ,  SEUNGGEOL RYU ,  EUNGCHANG LEE ,  KIWOOK JUNG ,  SUNGEUN JO

    IPC: H01L23/473 ,  H01L21/48 ,  H01L23/31 ,  H01L23/29 ,  H01L25/065

    Abstract: A semiconductor package includes; a package substrate, an interposer disposed on the package substrate, semiconductor chips mounted on the interposer, a molding member on the interposer and surrounding the semiconductor chips, a first sealing member on the molding member, and a heat dissipation member on the package substrate and covering the interposer, the semiconductor chips, and the first sealing member, wherein the heat dissipation member includes a lower structure contacting an upper surface of the package substrate, and an upper structure on the lower structure, extending over the first sealing member, and including a microchannel and a micropillar on the microchannel.

    SEMICONDUCTOR PACKAGE
    3.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20230096170A1

    公开(公告)日：2023-03-30

    申请号：US17734700

    申请日：2022-05-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： TAEHWAN KIM ,  YOUNG-DEUK KIM ,  JAE CHOON KIM ,  KYUNG SUK OH ,  EUNGCHANG LEE

    IPC: H01L23/48 ,  H01L25/065 ,  H01L23/00

    Abstract: A semiconductor package may include vertically-stacked semiconductor chips and first, second, and third connection terminals connecting the semiconductor chips to each other. Each of the semiconductor chips may include a semiconductor substrate, an interconnection layer on the semiconductor substrate, penetration electrodes connected to the interconnection layer through the semiconductor substrate, and first, second, and third groups on the interconnection layer. The interconnection layer may include an insulating layer and first and second metal layers in the insulating layer. The first and second groups may be in contact with the second metal layer, and the third group may be spaced apart from the second metal layer. Each of the first and third groups may include pads connected to a corresponding one of the first and third connection terminals in a many-to-one manner. The second group may include pads connected to the second connection terminal in a one-to-one manner.

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