公开(公告)号：US20210367630A1

公开(公告)日：2021-11-25

申请号：US17215503

申请日：2021-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsea CHO ,  Jiseon PAEK ,  Wan KIM ,  Daechul JEONG

IPC: H04B1/04 ,  H04B1/00

Abstract: A radio frequency (RF) transmitter including a switched-capacitor digital-to-analog converter (SC-DAC) configured to selectively generate a first RF output signal having a first output power control range or a second RF output signal having a second output power control range from input signals received through a plurality of lines may be provided.

公开(公告)号：US20230163778A1

公开(公告)日：2023-05-25

申请号：US18057969

申请日：2022-11-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Sea CHO ,  Wan KIM ,  Yong LIM

IPC: H03M1/38 ,  H03M1/12

CPC classification number: H03M1/38 ,  H03M1/1245

Abstract: An analog-to-digital converter is provided. An analog-to-digital converter includes a comparator including a first input node receiving an output of a plurality of first unit capacitors and a second input node receiving an output of a plurality of second unit capacitors, a control logic configured to output first and second control signals on the basis of an output signal of the comparator, and a reference voltage adjustment circuit configured to adjust an output voltage provided to the comparator on the basis of the first and second control signals. The reference voltage adjustment circuit comprises a first pull-up circuit configured to apply a first reference voltage to each of the plurality of first unit capacitors and a first pull-down circuit configured to apply a second reference voltage to each of the plurality of second unit capacitors, based on v.

公开(公告)号：US20220376698A1

公开(公告)日：2022-11-24

申请号：US17560400

申请日：2021-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsea CHO ,  Wan KIM ,  Jiseon PAEK ,  Seunghyun OH

IPC: H03M1/46 ,  H03M1/12

Abstract: Provided are an analog-to-digital converter and/or an operating method thereof. The analog-to-digital converter includes a sample/hold circuit, a digital-to-analog converter, a comparing circuit, and a control logic circuit, wherein the digital-to-analog converter includes a first capacitor connected to a first comparison node and a first filtering node, a first reference voltage switch connected to the first filtering node and connected to a first delivery node or a first transmission node, a first pre-charge switch connected to the first filtering node or the first delivery node, and a first pre-charge capacitor connected to the first pre-charge switch and a ground voltage.

公开(公告)号：US20210367624A1

公开(公告)日：2021-11-25

申请号：US17196463

申请日：2021-03-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngsea CHO ,  Jiseon PAEK ,  Wan KIM ,  Daechul JEONG

IPC: H04B1/00 ,  H04B1/62 ,  H04B1/16

Abstract: A digital radio frequency (RF) transmitter including processing circuitry configured to generate first through third pattern signals based on a pattern of an inphase (I)-quadrature (Q) binary data pair and a pattern of an inverted I-Q binary data pair, the first through third pattern signals having a same pattern and different phases, and a switched-capacitor digital-to-analog converter (SC-DAC) configured to remove an n-th harmonic component of an RF analog signal by amplifying the first through third pattern signals to have a certain magnitude ratio and synthesizing the amplified first through third pattern signals into the RF analog signal, where “n” is an integer of at least 3, may be provided.

公开(公告)号：US20250088404A1

公开(公告)日：2025-03-13

申请号：US18957074

申请日：2024-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Han KIM ,  Sung Soo KIM ,  Wan KIM

IPC: H04L27/38 ,  H03K5/00 ,  H03K5/01

Abstract: An electronic device includes a feedback oscillator configured to output a first oscillation signal and a second oscillation signal, the second oscillation signal having a defined phase difference from the first oscillation signal, the feedback oscillator including a phase shifter configured to receive the first oscillation signal and output the second oscillation signal, an up-conversion mixer configured to output a first loopback signal obtained by mixing the first oscillation signal with a reference tone signal, and output a second loopback signal obtained by mixing the second oscillation signal with the reference tone signal, and a receiver configured to generate a first reference IQ signal from the first loopback signal, generate a second reference IQ signal from the second loopback signal, and compare an actual phase difference between the first reference IQ signal and the second reference IQ signal with the defined phase difference.

公开(公告)号：US20240171186A1

公开(公告)日：2024-05-23

申请号：US18422192

申请日：2024-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngsea CHO ,  Wan KIM ,  Jiseon PAEK ,  Seunghyun OH

IPC: H03M1/06

CPC classification number: H03M1/0617 ,  H03M1/66

Abstract: A current steering digital-to-analog converter includes a plurality of current cells each including a current source circuit and a current switch circuit to selectively output a current in response to a first input signal corresponding to a digital signal; a dummy current cell including a dummy current source circuit and a dummy current switch circuit to output a current in response to a second input signal; and a current switch bias circuit coupled to the dummy current cell to track a first voltage of an internal node of the dummy current source circuit and configured to generate a first bias voltage applied to the current switch circuit.

公开(公告)号：US20210058080A1

公开(公告)日：2021-02-25

申请号：US16842051

申请日：2020-04-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung Jin KIM ,  Wan KIM ,  Seung Hyun OH ,  Byung Ki HAN

IPC: H03K5/24 ,  H03B5/04 ,  H03B5/12

Abstract: A semiconductor device and a method for controlling amplitude of signal in the semiconductor device are provided. The semiconductor device comprises a signal generator configured to output a sinewave, a comparator configured to compare a magnitude of the sinewave with a magnitude of a reference signal at a first timing corresponding to a timing control signal and to output a comparison result, and a control signal adjustor configured to adjust one of the current control signal and a timing control signal depending on the comparison result of the comparator.