公开(公告)号：US10009036B2

公开(公告)日：2018-06-26

申请号：US15430163

申请日：2017-02-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wing-Fai Loke ,  Chih-Wei Yao

IPC: H03L7/06 ,  H03M1/10 ,  H03M1/38 ,  G04F10/00 ,  H03M1/12 ,  H03L7/099 ,  H03L7/087 ,  G06F17/50

CPC classification number: H03M1/1009 ,  H03L7/0995 ,  H03L7/0996 ,  H03L7/0998 ,  H03M1/183

Abstract: An apparatus and a method. The apparatus includes a counter array; a ring oscillator that is electrically coupled to the counter array, where the counter array counts a number of cycles in the ring oscillator; an analog-to-digital converter (ADC) driver that is electrically coupled to the ring oscillator; and an ADC that is electrically coupled to the ADC driver, where an output of the ADC is electrically coupled to the ring oscillator.

公开(公告)号：US20200014374A1

公开(公告)日：2020-01-09

申请号：US16572059

申请日：2019-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wing-Fai Loke ,  Chih-Wei Yao

IPC: H03K5/06 ,  H03K5/24 ,  H02M3/07

Abstract: A system and method for calibrating a duration of a pulse or a delay. A reference clock signal includes a sequence of reference pulses, and controls a switch in a first charge pump that is configured to charge a first capacitor. Each of a sequence of test pulses controls a switch in a second charge pump that is configured to charge a second capacitor. At the end of each charging cycle, the respective capacitor voltages are compared and the duration of the test pulses is adjusted, by a feedback circuit, in a direction tending to make the capacitor voltages equal. When the capacitor voltages are equal, the ratio of the lengths of the reference pulses and test pulses equals the ratio of the capacitances, if the charge pumps deliver the same current when switched on.

公开(公告)号：US20180302069A1

公开(公告)日：2018-10-18

申请号：US15636387

申请日：2017-06-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wing-Fai Loke ,  Chih-Wei Yao

IPC: H03K5/06 ,  H02M3/07 ,  H03K5/24

CPC classification number: H03K5/06 ,  H02M3/07 ,  H03K5/24 ,  H03K2005/00019

Abstract: A system and method for calibrating a duration of a pulse or a delay. A reference clock signal includes a sequence of reference pulses, and controls a switch in a first charge pump that is configured to charge a first capacitor. Each of a sequence of test pulses controls a switch in a second charge pump that is configured to charge a second capacitor. At the end of each charging cycle, the respective capacitor voltages are compared and the duration of the test pulses is adjusted, by a feedback circuit, in a direction tending to make the capacitor voltages equal. When the capacitor voltages are equal, the ratio of the lengths of the reference pulses and test pulses equals the ratio of the capacitances, if the charge pumps deliver the same current when switched on.

公开(公告)号：US10418981B2

公开(公告)日：2019-09-17

申请号：US15636387

申请日：2017-06-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Wing-Fai Loke ,  Chih-Wei Yao

IPC: H03K5/06 ,  H02M3/07 ,  H03K5/24 ,  H03K5/00

Abstract: A system and method for calibrating a duration of a pulse or a delay. A reference clock signal includes a sequence of reference pulses, and controls a switch in a first charge pump that is configured to charge a first capacitor. Each of a sequence of test pulses controls a switch in a second charge pump that is configured to charge a second capacitor. At the end of each charging cycle, the respective capacitor voltages are compared and the duration of the test pulses is adjusted, by a feedback circuit, in a direction tending to make the capacitor voltages equal. When the capacitor voltages are equal, the ratio of the lengths of the reference pulses and test pulses equals the ratio of the capacitances, if the charge pumps deliver the same current when switched on.