公开(公告)号：US11194579B2

公开(公告)日：2021-12-07

申请号：US16199679

申请日：2018-11-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Sung Shin ,  Sung-Ho Park ,  Chan-Kyung Kim ,  Yong-Sik Park ,  Sang-Hoon Shin

IPC: G06F9/355 ,  G06F9/30 ,  G06F9/345 ,  G06F12/0815

Abstract: A memory device includes a memory cell array formed in a semiconductor die, the memory cell array including a plurality of memory cells to store data and a calculation circuit formed in the semiconductor die. The calculation circuit performs calculations based on broadcast data and internal data and omits the calculations with respect to invalid data and performs the calculations with respect to valid data based on index data in a skip calculation mode, where the broadcast data are provided from outside the semiconductor die, the internal data are read from the memory cell array, and the index data indicates whether the internal data are the valid data or the invalid data. Power consumption is reduced by omitting the calculations and the read operation with respect to the invalid data through the skip calculation mode based on the index data.