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    Frequency assignment method and transmission apparatus therefor
    1.
    发明授权
    Frequency assignment method and transmission apparatus therefor 有权

    公开(公告)号：US10111234B2

    公开(公告)日：2018-10-23

    申请号：US14549133

    申请日：2014-11-20

    Applicant: Samsung Electronics Co., Ltd. ,  Korea University Research and Business Foundation

    Inventor： Sung-Ho Park ,  Young-Chai Ko ,  Myeong-Jin Kim

    IPC: H04W72/08 ,  H04W72/04 ,  H04W72/02

    Abstract: A frequency assignment method in a communication system is provided. The method includes transmitting, by a base station, a pilot signal to the plurality of terminals; receiving, by the base station, channel information and a Signal to Interference Ratio (SIR) from the plurality of terminals as feedback information; determining, by the base station, a number of subcarriers to be used for interference alignment and a terminal to which interference alignment is to be applied, using the feedback information; selecting, by the base station, a frequency set to be used for interference alignment among preset frequency sets for interference alignment, and generating a transmit precoding matrix using a maximum of Degrees of Freedom (DoF) that can be obtained for each frequency; and transmitting, by the base station, an index of the selected frequency set to the determined terminal using the generated transmit precoding matrix.

    Memory device supporting skip calculation mode and method of operating the same
    2.
    发明授权
    Memory device supporting skip calculation mode and method of operating the same 有权

    公开(公告)号：US11194579B2

    公开(公告)日：2021-12-07

    申请号：US16199679

    申请日：2018-11-26

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyun-Sung Shin ,  Sung-Ho Park ,  Chan-Kyung Kim ,  Yong-Sik Park ,  Sang-Hoon Shin

    IPC: G06F9/355 ,  G06F9/30 ,  G06F9/345 ,  G06F12/0815

    Abstract: A memory device includes a memory cell array formed in a semiconductor die, the memory cell array including a plurality of memory cells to store data and a calculation circuit formed in the semiconductor die. The calculation circuit performs calculations based on broadcast data and internal data and omits the calculations with respect to invalid data and performs the calculations with respect to valid data based on index data in a skip calculation mode, where the broadcast data are provided from outside the semiconductor die, the internal data are read from the memory cell array, and the index data indicates whether the internal data are the valid data or the invalid data. Power consumption is reduced by omitting the calculations and the read operation with respect to the invalid data through the skip calculation mode based on the index data.

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