公开(公告)号：US20130294158A1

公开(公告)日：2013-11-07

申请号：US13936857

申请日：2013-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Jin KONG ,  Sung Chung PARK ,  Dong-Ku KANG ,  Young Hwan LEE ,  Si Hoon HONG ,  Jae Woong HYUN

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483

Abstract: A multi-level cell (MLC) memory device may include ‘a’ number of m-bit MLC memory cells; an encoder that encodes ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream; and a signal mapping module that applies pulses to the MLC memory cells in order to write the encoded bit stream in the MLC memory cells. In the device, ‘a’ and ‘m’ may be integers greater than or equal to 2, ‘k’ and ‘n’ may be integers greater than or equal to 1, and ‘n’ may be greater than ‘k’. A method of storing data in the device may include encoding ‘k’ bits of data at a code rate of k/n to generate an encoded bit stream. A method of reading data from the device may include decoding ‘n’ bits of data at a code rate of n/k to generate a decoded bit stream.

Abstract translation: 多级单元（MLC）存储器件可以包括“a”个m位MLC存储器单元; 编码器，其以k / n的码率对“k”位数据进行编码，以产生编码比特流; 以及信号映射模块，其向MLC存储器单元施加脉冲以便将编码比特流写入MLC存储器单元。 在设备中，'a'和'm'可以是大于或等于2的整数，'k'和'n'可以是大于或等于1的整数，'n'可能大于'k'。 在设备中存储数据的方法可以包括以k / n的码率对'k'位数据进行编码，以产生编码比特流。 从设备读取数据的方法可以包括以n / k的码率对'n'比特的数据进行解码，以产生解码比特流。