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公开(公告)号：US20180090821A1
公开(公告)日：2018-03-29
申请号：US15720872
申请日：2017-09-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sang Ha LEE , Kyung Jae LEE , Jae Ho LIM , Dong Hwan KIM , Young Jun KIM , Un KIM , Jong Hoon KIM , Min Seok PARK
CPC classification number: H01Q1/243 , H01Q1/38 , H01Q5/328 , H01Q5/35 , H01Q5/40 , H01Q9/04 , H01Q9/42 , H01Q13/10
Abstract: An electronic device includes a metal housing, a conductive member disposed adjacent to the metal housing, a plurality of ground parts including a first ground part electrically connected with a first point of the conductive member and a second ground part electrically connected with a second point of the conductive member, a ground plate electrically connected with the metal housing and electrically connected with the conductive member via the plurality of ground parts, and a feeding part electrically connected with the conductive member.
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Patent Agency Ranking
公开(公告)号：US20170244818A1
公开(公告)日：2017-08-24
申请号：US15438362
申请日：2017-02-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyoung Mok KIM , Young Jun KIM , Yoon Jung KIM , Sang Bong SUNG , Shin Ho YOON , Jin Young JEONG
IPC: H04M1/02
CPC classification number: H04M1/026 , H01Q1/243 , H01Q5/314 , H01Q5/328 , H01Q5/335 , H01Q5/371 , H01Q9/42 , H01Q21/28 , H04M1/0277
Abstract: An electronic device is provided. The electronic device includes a housing including a first metallic member, a second metallic member, and a nonconductive segmenting part located between an end of the first metallic member and an end of the second metallic member, a ground member, a wireless communication circuit connected to a first point of the first metallic member through a first electrical path and connected to a second point of the first metallic member through a second electrical path, a first conductive pattern electrically connected to the first electrical path, a second conductive pattern electrically connected to the second electrical path, a first electrical variable element electrically connected between the first electrical path and the ground member, and a second electrical variable element electrically connected between the second metallic member and the ground member.
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公开(公告)号：US20250159871A1
公开(公告)日：2025-05-15
申请号：US18664850
申请日：2024-05-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Young Jun KIM , Ga Eun CHOI , Ji Hoon SUNG , Kyu Hyun CHA
IPC: H10B12/00
Abstract: A semiconductor memory device may include a substrate including a cell region, a peripheral region, and a boundary region therebetween, a plurality of gate electrodes extending in a first direction within the substrate of the cell region, a plurality of bit lines extending in a second direction crossing the first direction on the substrate of the cell region and the boundary region, a plurality of buried contacts connected to the substrate of the cell region and between the gate electrodes and between the bit lines on the substrate of the cell region, a dummy buried contact between the bit lines on the substrate of the boundary region, and a bit line contact connected to at least one of the bit lines on the substrate of the boundary region, wherein the dummy buried contact includes an insulating material.
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公开(公告)号：US20210407948A1
公开(公告)日：2021-12-30
申请号：US17175119
申请日：2021-02-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Young Jun KIM , Woon-Ki LEE , Jong Sun JUNG
Abstract: An integrated circuit chip includes a substrate on which a standard cell is disposed. The integrated circuit chip includes a plurality of power bumps including a plurality of first power bumps and a plurality of second power bumps, the plurality of power bumps. disposed to have a staggered arrangement in a central region of one surface of the integrated circuit chip, and connected to provide power to the standard cell; a first metal wiring disposed below the plurality of first power bumps and electrically connected to the plurality of first power bumps, at least a part of the first metal wiring overlapping the plurality of first power bumps from a plan view; and a second metal wiring horizontally separated from the first metal wiring, disposed below the plurality of second power bumps, and electrically connected to the plurality of second power bumps, at least a part of the second metal wiring overlapping the plurality of second power bumps from the plan view. The plurality of first power bumps are disposed along a first line extending in a first direction parallel to a first diagonal direction of the integrated circuit chip, and along a second line extending in a second direction parallel to a second diagonal direction of the integrated circuit chip different from the first diagonal direction, the first diagonal direction and second diagonal direction being diagonal with respect to edges of the integrated circuit chip, and the plurality of second power bumps are disposed along a third line spaced apart from the first line and extending in the first direction, and along a fourth line spaced apart from the second line and extending in the second direction.
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5.发明申请公开(公告)号：US20200013140A1
公开(公告)日：2020-01-09
申请号：US16571440
申请日：2019-09-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Young Jun KIM , Jin Aeon LEE
Abstract: Provided is a data processing device and a method of operating the same. The data processing device includes: a plurality of preprocessors configured to perform correction processing on a plurality of sensor data; a first switching circuit configured to selectively map and input the plurality of sensor data from at least two sensors to at least two preprocessors among the plurality of preprocessors; and a hybrid data processing engine configured to perform at least one of image enhancement and depth information determination on the plurality of sensor data received, via an on-the-fly method, from the at least two preprocessors.
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公开(公告)号：US20180108108A1
公开(公告)日：2018-04-19
申请号：US15843029
申请日：2017-12-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Young Jun KIM , Jin Aeon LEE
Abstract: Provided is a data processing device and a method of operating the same. The data processing device includes: a plurality of preprocessors configured to perform correction processing on a plurality of sensor data; a first switching circuit configured to selectively map and input the plurality of sensor data from at least two sensors to at least two preprocessors among the plurality of preprocessors; and a hybrid data processing engine configured to perform at least one of image enhancement and depth information determination on the plurality of sensor data received, via an on-the-fly method, from the at least two preprocessors.
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