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公开(公告)号：US10476681B2
公开(公告)日：2019-11-12
申请号：US16140019
申请日：2018-09-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yongsoo Kim , Mijung Noh , Bohdan Karpinskyy , Kyoungmoon Ahn , Yong Ki Lee , Yunhyeok Choi
Abstract: A semiconductor device includes a physical unclonable function (PUF) cell array that includes PUF cells outputting first bits; a non-volatile memory that stores marking bits indicating whether the first bits are valid, first mask bits generated by masking second bits depending on parity of the second bits, and second mask bits generated by masking helper bits of the second bits, the second bits are valid bits from the first bits; an extracting unit that extracts the second bits from the first bits using the marking bits; an unmasking unit that unmasks the second bits using the first mask bits while receiving the second bits to provide the third bits; a bit decoding unit that compresses the third bits to fourth bits while receiving the third bits; and a block decoding unit that generates a security key by decoding the fourth bits and the second mask bits.
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公开(公告)号：US20240201256A1
公开(公告)日：2024-06-20
申请号：US18538692
申请日：2023-12-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sumin Noh , Yongki Lee , Jieun Park , Yunhyeok Choi , Bohdan Karpinskyy
IPC: G01R31/3177 , H04L9/32
CPC classification number: G01R31/3177 , H04L9/3278
Abstract: A device is provided. The device includes: a plurality of physically unclonable function (PUF) cells, each of the plurality of PUF cells including at least one logic gate and being configured to generate an output signal based on at least one threshold level of the at least one logic gate; a signal generator configured to generate an input signal that is provided to each of the plurality of PUF cells; and a controller configured to, in a test mode, generate a control signal to control the signal generator to vary the input signal to control the plurality of PUF cells to output a plurality of output signals according to the input signal, and identify at least one weak PUF cell from among the plurality of PUF cells based on the output signal generated by the at least one weak PUF cell being an unstable output signal. The controller is further configured to disconnect the plurality of PUF cells from the signal generator in a normal mode.
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公开(公告)号：US11924359B2
公开(公告)日：2024-03-05
申请号：US17973252
申请日：2022-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungmoon Ahn , Yongsoo Kim , Yongki Lee , Yunhyeok Choi , Bohdan Karpinskyy
CPC classification number: H04L9/3278 , G06F21/64 , H04L9/0869
Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.
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公开(公告)号：US11368319B2
公开(公告)日：2022-06-21
申请号：US17015554
申请日：2020-09-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yongsoo Kim , Juyeon Lee , Mijung Noh , Yongki Lee , Yunhyeok Choi
Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.
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公开(公告)号：US20210234709A1
公开(公告)日：2021-07-29
申请号：US17015554
申请日：2020-09-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： YONGSOO KIM , Juyeon Lee , Mijung Noh , Yongki Lee , Yunhyeok Choi
Abstract: The present disclosure relates to an integrated circuit and a method of using the integrated circuit used to perform authentication using a challenge-response method. The challenge-response method includes an internal challenge generator, a physically unclonable function (PUF) block, and a response generator. The internal challenge generator is configured to receive a challenge, generate a plurality of internal challenges corresponding to the challenge, and generate at least one valid internal challenge among the plurality of internal challenges using screen information. The physically unclonable function (PUF) block is configured to generate a plurality of valid internal responses respectively changing according to the plurality of valid internal challenges. The response generator is configured to output a response generated using the plurality of valid internal responses.
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Patent Agency Ranking
公开(公告)号：US09377997B2
公开(公告)日：2016-06-28
申请号：US14148384
申请日：2014-01-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ihor Vasyltsov , Bohdan Karpinskyy , Heonsoo Lee , Yunhyeok Choi
Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.
Abstract translation: 随机数发生器包括：第一振荡器，被配置为输出具有第一频率的第一振荡信号。 第二振荡器被配置为输出具有与第一频率不同的第二频率的第二振荡信号。 采样单元被配置为接收第一和第二振荡信号。 采样单元被配置为通过组合所接收的第一和第二振荡信号来产生至少一个熵源。 采样单元被配置为使用第三振荡信号产生对应于所生成的熵源的随机位。 第三振荡器和控制单元被配置为控制第一和第二振荡器并产生第三振荡信号。 第三振荡信号的频率低于第一和第二频率。
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公开(公告)号：US11277272B2
公开(公告)日：2022-03-15
申请号：US16567751
申请日：2019-09-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yunhyeok Choi , Yongki Lee , Yongsoo Kim , Jieun Park , Bohdan Karpinskyy
Abstract: Systems and methods are described based on an integrated circuit that performs a challenge-response physically unclonable function (PUF). The PUF is used for challenge-response authentication. The integrated circuit includes a PUP block configured to output an n-bit internal response corresponding to a challenge that requests a response where n is an integer greater than 1 and a response generator configured to calculate a Hamming weight of the internal response and output the response by comparing the Hamming weight with at least one reference.
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公开(公告)号：US20140250160A1
公开(公告)日：2014-09-04
申请号：US14148384
申请日：2014-01-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： VASYLTSOV IHOR , Bohdan Karpinskyy , Heonsoo Lee , Yunhyeok Choi
IPC: G06F7/58
Abstract: A random number generator includes a first oscillator configured to output a first oscillating signal having a first frequency. A second oscillator is configured to output a second oscillating signal having a second frequency different from the first frequency. A sampling unit is configured to receive the first and second oscillating signals. The sampling unit is configured to generate at least one entropy source by combining the received first and second oscillating signals. The sampling unit is configured to generate a random bit corresponding to the generated entropy source using a third oscillating signal. A third oscillator & control unit is configured to control the first and second oscillators and to generate the third oscillating signal. A frequency of the third oscillating signal is lower than the first and second frequencies.
Abstract translation: 随机数发生器包括：第一振荡器，被配置为输出具有第一频率的第一振荡信号。 第二振荡器被配置为输出具有与第一频率不同的第二频率的第二振荡信号。 采样单元被配置为接收第一和第二振荡信号。 采样单元被配置为通过组合所接收的第一和第二振荡信号来产生至少一个熵源。 采样单元被配置为使用第三振荡信号产生对应于所生成的熵源的随机位。 第三振荡器和控制单元被配置为控制第一和第二振荡器并产生第三振荡信号。 第三振荡信号的频率低于第一和第二频率。
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公开(公告)号：US20230153069A1
公开(公告)日：2023-05-18
申请号：US17944486
申请日：2022-09-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jieun Park , Yongki Lee , Sumin Noh , Yunhyeok Choi , Bohdan Karpinskyy
IPC: G06F7/58
CPC classification number: G06F7/58
Abstract: A random number generator according to example embodiments includes an initial random number generator configured to generate an initial random number, a self-timed ring (STR) oscillator configured to receive the initial random number, the STR oscillator having a plurality of ring stages generating, in response to a clock, either a bubble that does not change an output state of a previous clock or a token changing the output state of the previous clock, a duty corrector configured to adjust a duty of each of output values of the ring stages, and a sampling circuit configured to sample a random number using a logic operation from the duty-corrected output values.
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10.发明授权公开(公告)号：US11516026B2
公开(公告)日：2022-11-29
申请号：US17014418
申请日：2020-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungmoon Ahn , Yongsoo Kim , Yongki Lee , Yunhyeok Choi , Bohdan Karpinskyy
Abstract: A security device generates a key based on a physically unclonable function (PUF). The security device includes a physically unclonable function (PUF) block, an integrity detector, and a post processor. The PUF block outputs a plurality of first random signals and a plurality of corresponding first inverted random signals each having a logic level opposite to that of each of the plurality of corresponding first random signals. The integrity detector determines data integrity of the plurality of first random signals by using the plurality of first random signals and the plurality of corresponding first inverted random signals. The post processor generates a first row key that includes validity signals satisfying the data integrity.
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