Semiconductor devices including flared source structures

    公开(公告)号:US11201168B2

    公开(公告)日:2021-12-14

    申请号:US16735085

    申请日:2020-01-06

    Abstract: A semiconductor device includes a structure including gate electrodes and interlayer insulating layers alternately stacked on an upper surface of a substrate, trenches passing through the structure; and a groove passing through a portion of the structure. The gate electrodes include word lines, and first and second select lines. The word lines are stacked in a vertical direction upwardly from the upper surface of the substrate. The first and second select lines are on the word lines, and are spaced apart from each other in a first horizontal direction parallel to the upper surface of the substrate. The trenches include a first trench and a second trench spaced apart from the first trench. The groove is on the word lines. The groove and a portion of the first trench are between the first select line and the second select line. The second trench is spaced apart from the select lines.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20200373306A1

    公开(公告)日:2020-11-26

    申请号:US16991738

    申请日:2020-08-12

    Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

    Semiconductor device and method of fabricating the same

    公开(公告)号:US10804277B2

    公开(公告)日:2020-10-13

    申请号:US15718737

    申请日:2017-09-28

    Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

    Method and device for decoding video

    公开(公告)号:US12200230B2

    公开(公告)日:2025-01-14

    申请号:US18467662

    申请日:2023-09-14

    Inventor: Sun Young Lee

    Abstract: The present invention discloses a video decoding method performed by a video decoding device. The video decoding method according to an embodiment may include the steps of: obtaining NAL unit type information indicating a type of a current network abstraction layer (NAL) unit from a bitstream; and decoding, when the NAL unit type information indicates that the NAL unit type of the current NAL unit is an encoded data for an slice, the slice based on whether a mixed NAL unit type is applied to a current picture.

    Semiconductor device and method of fabricating the same

    公开(公告)号:US11462547B2

    公开(公告)日:2022-10-04

    申请号:US16991738

    申请日:2020-08-12

    Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

    Semiconductor devices including flared source structures

    公开(公告)号:US10529734B2

    公开(公告)日:2020-01-07

    申请号:US15869766

    申请日:2018-01-12

    Abstract: A semiconductor device can include a semiconductor substrate having a memory cell region and a pad region that is adjacent to the memory cell region, the pad region can include a first pad region, a second pad region between the memory cell region and the first pad region, and a buffer region that is between the first and second pad regions. A separation source structure can include a first portion and a second portion that are parallel to each other in a plan view of the semiconductor device. A first source structure and a second source structure can be disposed between the first and second portions of the separation source structure, where the first and second source structures can have end portions that oppose each other, the first source structure being disposed in the first pad region, and the second source structure being disposed in the second pad region. A gate group can be disposed in the memory cell region and the pad region between the first and second portions of the separation source structure, where each of the end portions of the first and second source structures has a planar shape, and a width of each end portion increases and then decreases as each of the end portions extends toward the other.

    Docking station having structure for sound amplification and sound quality enhancement
    9.
    发明授权
    Docking station having structure for sound amplification and sound quality enhancement 有权
    对接站具有声音放大和音质提升的结构

    公开(公告)号:US09100751B2

    公开(公告)日:2015-08-04

    申请号:US13925252

    申请日:2013-06-24

    CPC classification number: H04R1/30 H04R1/2853 H04R1/2861 H04R5/02 H04R2205/021

    Abstract: A docking station for sound amplification and sound quality enhancement is provided. The docking station includes a support structure for holding a mobile terminal having an internal speaker to sustain the posture of the mobile terminal, and a body for supporting the support structure, and for physically contacting the speaker to increase the volume of sound output from the speaker. The body includes a collecting hole for contacting the speaker to collect sound waves, and a guide hole that extends from the collecting hole through the body to the outside along an extension direction, is divided into two branches within the body to guide the collected sound waves along different paths, and has a horn shape whose cross section increases along the extension direction. Hence, the docking station can increase the volume of audible sound and sound quality without separate supply of power.

    Abstract translation: 提供用于声音放大和声音质量增强的坞站。 对接站包括用于保持具有内部扬声器的移动终端以支持移动终端的姿势的支撑结构,以及用于支撑支撑结构的主体,并且用于物理地接触扬声器以增加从扬声器输出的声音的音量 。 主体包括用于接触扬声器以收集声波的收集孔,并且沿着延伸方向从收集孔穿过主体延伸到外部的引导孔在主体内被分成两个分支,以引导收集的声波 沿着不同的路径,并且具有横截面沿着延伸方向增加的喇叭形状。 因此,对接站可以增加可听见的声音和音质的音量,而不需要单独的电力供应。

    Video decoding method and device
    10.
    发明授权

    公开(公告)号:US12238288B2

    公开(公告)日:2025-02-25

    申请号:US18408484

    申请日:2024-01-09

    Inventor: Sun Young Lee

    Abstract: Provided are a video decoding method and device. This specification provides a video decoding method comprising the steps of: acquiring a parameter indicating whether a multiple transform set is applicable to a block to be decoded, as well as information about the width of the block to be decoded and the height of the block to be decoded; determining the transform type of the block to be decoded on the basis of at least one of the parameter indicating whether a multiple transform set is applicable, or the information about the width and height of the block to be decoded, and setting a zero-out region of the block to be decoded; and inverse-transforming the block to be decoded on the basis of the zero-out region of the block to be decoded and the result of determining the transform type.

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