Data transfer circuit and method with compensated clock jitter
    1.
    发明授权
    Data transfer circuit and method with compensated clock jitter 有权
    具有补偿时钟抖动的数据传输电路和方法

    公开(公告)号:US08269537B2

    公开(公告)日:2012-09-18

    申请号:US12754794

    申请日:2010-04-06

    IPC分类号: H03L7/00

    CPC分类号: H03K5/1565 H03K2005/0013

    摘要: A data I/O interface for an integrated circuit device includes a noise detector receiving a power supply voltage, detecting a power supply voltage noise component, and providing a clock delay control signal in response to detected power supply voltage noise component. The data I/O interface also includes a clock delay circuit providing a delayed clock signal in response to the clock delay control signal, and a data transfer circuit powered by the power supply voltage and providing output data synchronously with the delayed clock signal.

    摘要翻译: 用于集成电路装置的数据I / O接口包括接收电源电压的噪声检测器,检测电源电压噪声分量,以及响应于检测到的电源电压噪声分量提供时钟延迟控制信号。 数据I / O接口还包括响应于时钟延迟控制信号提供延迟时钟信号的时钟延迟电路和由电源电压供电并且与延迟的时钟信号同步地提供输出数据的数据传输电路。

    Phase-locked loop and bias generator
    2.
    发明授权
    Phase-locked loop and bias generator 有权
    锁相环和偏置发生器

    公开(公告)号:US08159275B2

    公开(公告)日:2012-04-17

    申请号:US12627730

    申请日:2009-11-30

    IPC分类号: H03L7/06

    CPC分类号: H03L7/08

    摘要: A phase-locked loop (PLL) having a bias generator capable of reducing noise is provided. In the PLL, a voltage controlled oscillator is driven using a regulator. The bias generator, which applies a bias voltage to the regulator, is configured to have opposite power noise characteristics to the power noise characteristics of the regulator, such that the occurrence of jitter in the PLL is reduced.

    摘要翻译: 提供了具有能够降低噪声的偏置发生器的锁相环(PLL)。 在PLL中,使用稳压器驱动压控振荡器。 将偏置电压施加到调节器的偏置发生器被配置为具有与调节器的功率噪声特性相反的功率噪声特性,使得PLL中的抖动的发生减少。

    Data transfer circuit and method with compensated clock jitter
    3.
    发明授权
    Data transfer circuit and method with compensated clock jitter 有权
    具有补偿时钟抖动的数据传输电路和方法

    公开(公告)号:US08497718B2

    公开(公告)日:2013-07-30

    申请号:US13613342

    申请日:2012-09-13

    IPC分类号: H03L7/00

    CPC分类号: H03K5/1565 H03K2005/0013

    摘要: A data I/O interface for an integrated circuit device includes a noise detector receiving a power supply voltage, detecting a power supply voltage noise component, and providing a clock delay control signal in response to detected power supply voltage noise component. The data I/O interface also includes a clock delay circuit providing a delayed clock signal in response to the clock delay control signal, and a data transfer circuit powered by the power supply voltage and providing output data synchronously with the delayed clock signal.

    摘要翻译: 用于集成电路装置的数据I / O接口包括接收电源电压的噪声检测器,检测电源电压噪声分量,以及响应于检测到的电源电压噪声分量提供时钟延迟控制信号。 数据I / O接口还包括响应于时钟延迟控制信号提供延迟时钟信号的时钟延迟电路和由电源电压供电并且与延迟的时钟信号同步地提供输出数据的数据传输电路。

    Semiconductor memory device comprising variable delay unit
    4.
    发明授权
    Semiconductor memory device comprising variable delay unit 有权
    半导体存储器件包括可变延迟单元

    公开(公告)号:US08339877B2

    公开(公告)日:2012-12-25

    申请号:US12764460

    申请日:2010-04-21

    IPC分类号: G11C7/00

    摘要: A semiconductor memory device comprises a variable delay unit and a data trainer. The variable delay unit is configured to generate a write data signal by delaying a write data driving signal by different amounts of time depending on whether the semiconductor memory device is in a data training mode or a normal operating mode, and further configured to generate a read data driving signal by delaying a read data signal by different amounts of time in the data training mode and the normal operating mode. The data trainer is configured to be activated in the data training mode, and while activated, receive the write data signal, compare the write data signal with a predetermined write pattern, perform a data training mode operation, and output the read data signal with a predetermined read pattern.

    摘要翻译: 半导体存储器件包括可变延迟单元和数据训练器。 可变延迟单元被配置为根据半导体存储器件是处于数据训练模式还是正常操作模式,通过将写入数据驱动信号延迟不同的时间量来产生写入数据信号,并且还被配置为产生读取 数据驱动信号,通过在数据训练模式和正常操作模式下延迟读取数据信号不同的时间量。 数据训练器被配置为在数据训练模式下被激活,并且被激活时,接收写入数据信号,将写入数据信号与预定的写入模式进行比较,执行数据训练模式操作,并将读出的数据信号输出 预定的读取模式。

    Phase-Locked Loop and Bias Generator
    5.
    发明申请
    Phase-Locked Loop and Bias Generator 有权
    锁相环和偏置发生器

    公开(公告)号:US20100141311A1

    公开(公告)日:2010-06-10

    申请号:US12627730

    申请日:2009-11-30

    IPC分类号: H03L7/06 H03K3/01

    CPC分类号: H03L7/08

    摘要: A phase-locked loop (PLL) having a bias generator capable of reducing noise is provided. In the PLL, a voltage controlled oscillator is driven using a regulator. The bias generator, which applies a bias voltage to the regulator, is configured to have opposite power noise characteristics to the power noise characteristics of the regulator, such that the occurrence of jitter in the PLL is reduced.

    摘要翻译: 提供了具有能够降低噪声的偏置发生器的锁相环(PLL)。 在PLL中,使用稳压器驱动压控振荡器。 将偏置电压施加到调节器的偏置发生器被配置为具有与调节器的功率噪声特性相反的功率噪声特性,使得PLL中的抖动的发生减少。

    Flexible display device
    6.
    发明授权
    Flexible display device 有权
    灵活的显示设备

    公开(公告)号:US09019313B2

    公开(公告)日:2015-04-28

    申请号:US13426478

    申请日:2012-03-21

    CPC分类号: G06F1/1652 G06F2203/04102

    摘要: A display device includes a flexible display including a flexible display panel and a flexible touch panel, and a housing configured to enclose the flexible display while allowing the flexible display to move relative to the housing such that a portion of the flexible display is drawn out of the housing and retracted into the housing. The display device further includes a marker configured to contact a location of the flexible touch panel when a portion of the flexible display is drawn out of the housing. The marker is provided such that the contact location changes as the flexible display moves relative to the housing. The display device also includes at least one processor configured to compute the contact location on the flexible display and to adjust the size of an image displayed on the flexible display panel based on the computed contact location.

    摘要翻译: 显示装置包括柔性显示器,其包括柔性显示面板和柔性触摸面板,以及壳体,被配置为围绕柔性显示器,同时允许柔性显示器相对于壳体移动,使得柔性显示器的一部分被拉出 外壳并缩回到外壳内。 显示装置还包括标记,该标记被配置为当柔性显示器的一部分被拉出壳体时接触柔性触摸面板的位置。 提供标记,使得当柔性显示器相对于壳体移动时,接触位置改变。 显示装置还包括至少一个处理器,其被配置为计算柔性显示器上的接触位置,并且基于所计算的接触位置来调整显示在柔性显示面板上的图像的尺寸。

    Flexible display device and method of sensing warpage of the same
    7.
    发明授权
    Flexible display device and method of sensing warpage of the same 有权
    柔性显示装置及其感应翘曲的方法

    公开(公告)号:US09007315B2

    公开(公告)日:2015-04-14

    申请号:US13604332

    申请日:2012-09-05

    IPC分类号: G06F3/041 G06F3/044

    摘要: A flexible display device includes: a flexible display unit configured to display an image; a flexible touch screen unit disposed over the flexible display unit; an insulating film interposed between the flexible display unit and the flexible touch screen unit, and a spacer formed between the flexible touch screen unit and the insulating film in order to maintain a distance between the flexible touch screen unit and the insulating film. A conductive layer is further formed over the insulating film and configured to touch the flexible touch screen unit when the flexible display device is bent. A degree of warpage of the flexible display device can be measured and thus can be utilized in various warpage events of the flexible display device by using warpage values.

    摘要翻译: 柔性显示装置包括:柔性显示单元,被配置为显示图像; 设置在所述柔性显示单元上的柔性触摸屏单元; 插入在柔性显示单元和柔性触摸屏单元之间的绝缘膜,以及形成在柔性触摸屏单元和绝缘膜之间的间隔件,以便保持柔性触摸屏单元和绝缘膜之间的距离。 导电层进一步形成在绝缘膜上并被配置为当柔性显示装置弯曲时触摸柔性触摸屏单元。 可以测量柔性显示装置的翘曲程度,因此可以通过使用翘曲值在柔性显示装置的各种翘曲事件中使用。

    SWITCH CIRCUIT USING LDMOS ELEMENT
    8.
    发明申请
    SWITCH CIRCUIT USING LDMOS ELEMENT 有权
    使用LDMOS元件切换电路

    公开(公告)号:US20120241859A1

    公开(公告)日:2012-09-27

    申请号:US13425357

    申请日:2012-03-20

    IPC分类号: H01L27/06

    摘要: The present invention relates to a switch circuit, and more particularly, to a switch circuit that uses an LDMOS (lateral diffusion metal oxide semiconductor) device inside an IC (Integrated Circuit). In the switch circuit that uses the LDMOS device according to an embodiment of the present invention, a gate-source voltage (VGS) of the LDMOS device may be stably controlled through a current source and resistances, the characteristics of a switch may be maintained regardless of the voltages of both terminals (A and B) by using an N-type LDMOS and a P-type LDMOS in a complementary manner, and the current generated by the current source is offset inside the switch without flowing to the outside of the switch.

    摘要翻译: 开关电路技术领域本发明涉及开关电路,更具体地说,涉及在IC(集成电路)内使用LDMOS(横向扩散金属氧化物半导体)器件的开关电路。 在使用根据本发明的实施例的LDMOS器件的开关电路中,可以通过电流源和电阻稳定地控制LDMOS器件的栅极 - 源极电压(VGS),开关的特性可以保持不变 通过以互补的方式使用N型LDMOS和P型LDMOS来实现两端(A和B)的电压,并且由电流源产生的电流在开关内部偏移而不流到开关的外部 。

    Method for Manufacturing Float Glass and Apparatus for Manufacturing the Same
    10.
    发明申请
    Method for Manufacturing Float Glass and Apparatus for Manufacturing the Same 有权
    制造浮法玻璃的方法及其制造方法

    公开(公告)号:US20110203322A1

    公开(公告)日:2011-08-25

    申请号:US12677073

    申请日:2009-10-01

    IPC分类号: C03B18/18 C03B18/16

    CPC分类号: C03B18/18 Y02P40/57

    摘要: The present invention provides a method for manufacturing a float glass by floating the glass on a molten tin that is contained in a molten tin bath, which includes the steps of a) discharging a portion of the molten tin in the molten tin bath to the outside of the molten tin bath; b) removing oxygen dissolved in the molten tin that is discharged from the molten tin bath by injecting an oxygen stripping gas that contains hydrogen into the molten tin; and c) returning the molten tin from which oxygen is removed to the molten tin bath, and an apparatus for manufacturing the same.

    摘要翻译: 本发明提供了一种通过将玻璃漂浮在熔融锡浴中包含的熔融锡上来制造浮法玻璃的方法,其包括以下步骤:a)将熔融锡浴中的熔融锡的一部分排出到外部 的熔融锡浴; b)通过将含有氢气的氧气汽提气体注入到熔融锡中,去除溶解在熔融锡熔液中的氧气; 以及c)将从其中除去氧的熔融锡返回到熔融锡浴中,以及制造该熔融锡的装置。