Burn-in stress circuit for semiconductor memory device
    1.
    发明授权
    Burn-in stress circuit for semiconductor memory device 失效
    半导体存储器件的老化应力电路

    公开(公告)号:US5949724A

    公开(公告)日:1999-09-07

    申请号:US858769

    申请日:1997-05-19

    CPC分类号: G11C29/34

    摘要: A burn-in stress circuit for a semiconductor memory device. A burn-in enable signal generator generates a burn-in enable signal in response to a plurality of control signals. A wordline predecoder generates a wordline driving voltage for driving a wordline in response to the burn-in enable signal and another a plurality of control signals. A wordline decoder applies the wordline driving voltage to the wordline in response to the burn-in enable signal and another plurality of control signals. To reduce the stress testing time by stressing multiple rows of a memory array simultaneously, all of the wordlines (rows) are stressed and or tested at the same time. To select all of the wordlines, the wordlines are selected sequentially, but each selected wordline is held in a selected state by a latching mechanism while all of the other wordlines are being selected as well. When all of the wordlines (or a desired subset) have been selected, the burn-in stress test begins.

    摘要翻译: 一种用于半导体存储器件的老化应力电路。 老化启动信号发生器响应于多个控制信号产生老化启用信号。 字线预解码器响应于老化允许信号和另一个多个控制信号产生用于驱动字线的字线驱动电压。 字线解码器响应于老化启用信号和另外多个控制信号将字线驱动电压施加到字线。 为了通过同时强调多行存储器阵列来减少压力测试时间,所有字线(行)都被同时强调和/或测试。 为了选择所有字线,顺序地选择字线,但是通过锁存机构将所选择的每个字线保持在选择状态,同时也选择所有其他字线。 当所有字线(或所需的子集)都被选择时,老化压力测试开始。