摘要:
A method and system for displaying a series of video frames so that picture corruption from video channel underflows is avoided. The method comprises the steps of receiving a data stream with compressed video data for the series of video frames, storing the compressed video data in a channel buffer, processing a video frame if sufficient compressed video data for the video frame is stored in the channel buffer, and displaying a preceding video frame if insufficient compressed video data for the video frame is stored in the channel buffer. The system, which displays a series of video frames, also addresses the issue of video channel underflow. The video frames are received as compressed video data in a data stream that also includes size parameters, such as the vbv.sub.-- delay parameter in the frame headers of MPEG frames, for each video frame in the series of video frames. The system comprises an input for receiving a data stream, a channel buffer for storing the compressed video data, a decoder that decodes the compressed video data and provides the decoded video data to a display device, and an underflow detector that compares the amount of compressed video data in the channel buffer to the required amount of compressed video data. If the amount of compressed video data in the channel buffer is less than the required amount, the decoder to pause before decoding the frame until a sufficient amount of compressed video data is available.
摘要:
A method and system for displaying a series of video frames in reverse order. The video frames are received in groups of pictures (GOPs) from a storage medium. The method comprises steps of (a) decoding and storing a number of frames from an initial GOP into frame buffers according to an ordering of the frame buffers, (b) displaying the stored frames according to the reverse ordering of the frame buffers, (c) decoding and storing a number of frames from a first preceding GOP according to the reverse ordering of the frame buffers, (d) displaying the stored frames according to the ordering of the frame buffers, (e) decoding and storing a number of frames from a second preceding GOP according to the ordering of the frame buffers, and (f) repeating steps (b)-(e),for prior first and second preceding GOPs.
摘要:
An audio decoder is described which supports simple sound-effect generation. The audio decoder includes a direct access pulse code modulation (PCM) first-in-first-out buffer (FIFO) to support simple sound effect generation. In one embodiment, the audio decoder additionally includes an input buffer, a decoding module, and an output interface. The input buffer buffers incoming data frames for the decoding module to retrieve and convert to a sequence of decoded audio samples. The FIFO is configured to receive and buffer audio sound effect samples from a control component external to the audio decoder. The output interface is configurable to retrieve decoded audio samples from the decoding module and audio sound effect samples from the FIFO. Any retrieved audio sound effect samples are included in a digital audio output signal provided by the output interface. The digital audio output signal may be provided directly to a digital-to-analog converter for sound reproduction. The availability of the FIFO for direct writing of audio samples by control components of the system provides desirable system features at negligible cost. A control component of the system is provided with the ability to easily generate test tones, to produce audio feedback to assist in user-control manipulation, and to support new system features such as alarm clocks and timers.
摘要:
A multimedia decoder is provided with an audio decoder bypass module for forwarding undecoded audio bitstreams directly to external system components. In one embodiment, the multimedia decoder includes an audio decoder, and a bypass module. The audio decoder operates on the data in an audio bitstream buffer to convert at least a portion of the audio bitstream into a set of digital audio signals. The bypass module is configured to provide the full information content of the audio bitstream to an external system component which may be able to convert a greater portion of the audio bitstream into a second set of digital audio signals. As the audio decoder and bypass module each retrieve data from the audio bitstream buffer, they each use a pointer to track which location of the buffer to access next. The bypass module maintains a loose synchronization with the audio decoder by calculating the difference between the pointers and transmitting the current audio packet only if the magnitude of the difference doesn't exceed a predetermined threshold. If the bypass module is lagging behind the audio decoder by more than the threshold amount, then it skips ahead to the next audio packet. On the other hand, if the decoder is lagging behind the bypass module by more than the threshold amount, the bypass module waits for the audio decoder to catch up. This technique advantageously prevents detectable discrepancies in reproduced audio signals while allowing for system upgradability without significant increase in implementation cost.
摘要:
An audio decoder which includes a coefficient memory and an arithmetic logic unit (ALU) can implement an efficient method for calculating a gain value specified by a range control field. In one embodiment, the audio decoder comprises coefficient memory, an ALU, frame control logic, and ALU control logic. The frame control logic extracts a range control field value from an audio packet header and provides it to the ALU control logic. The ALU control logic takes the binary representation of the range control field value and uses it to provide a sequence of addresses to the coefficient memory. In response to the sequence of addresses, the coefficient memory provides a sequence of pre-calculated factors to the ALU. The ALU control logic further directs the ALU to determine the product of the pre-calculated factors in the sequence. As a final step in finding the gain value, the ALU control logic may provide a shift instruction to the ALU. In one specific implementation, there is a maximum of three pre-calculated factors and one shift instruction required for one calculation of the gain value, and a required storage of only seven non-unity pre-calculated factors.