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公开(公告)号：US06924687B2
公开(公告)日：2005-08-02
申请号：US10630949
申请日：2003-07-29
IPC分类号： H03K19/003 , H03L5/00
CPC分类号： H03K19/00315
摘要： An invention is disclosed for protecting an input buffer. A current from a p-supply to an input buffer is lowered when an input voltage to the input buffer is tolerant HIGH. The p-supply being a VDD voltage supplied to a p-channel transistor in the input buffer. In addition, the p-supply is set to a particular voltage when the input voltage to the input buffer is LOW, the particular voltage being at a specific value such that input transistors within the input buffer do not experience overstress voltages. Optionally, p-supply can be prevented from supplying current to the input buffer when an input voltage to the input buffer is tolerant HIGH.
摘要翻译： 公开了一种用于保护输入缓冲器的发明。 当输入缓冲器的输入电压容限为高电平时，从p电源到输入缓冲器的电流降低。 p电源是提供给输入缓冲器中的p沟道晶体管的V DD电压。 此外，当输入缓冲器的输入电压为低电平时，p电源被设置为特定电压，特定电压处于特定值，使得输入缓冲器内的输入晶体管不经历过应力电压。 可选地，当输入缓冲器的输入电压容限为高电平时，可以防止p电源向输入缓冲器提供电流。
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公开(公告)号：US07005910B2
公开(公告)日：2006-02-28
申请号：US10759339
申请日：2004-01-16
IPC分类号： H03K17/04
CPC分类号： H03K19/01707
摘要： An invention is provided for a feed forward circuit that reduces delay through an inverting circuit. The feed forward circuit includes an inverter having an input and an output, and an inverting circuit having an input and an output. The input of the inverting circuit is coupled to the output of the inverter. A feed forward transistor having a gate coupled to the input of the inverter and a terminal coupled to the output of the inverting circuit also is included. In operation the feed forward transistor decreases the amount of time required for the output of the inverting circuit to change state. In sum, the invention reduces the delay when the inverting circuit transitions to a high state, without affecting the timing of the transition to a low state.
摘要翻译： 提供了一种用于减少通过反相电路的延迟的前馈电路的发明。 前馈电路包括具有输入和输出的反相器和具有输入和输出的反相电路。 反相电路的输入耦合到逆变器的输出端。 还包括具有耦合到反相器的输入端的栅极和耦合到反相电路的输出的端子的前馈晶体管。 在操作中，前馈晶体管减小了反相电路的输出改变状态所需的时间量。 总之，本发明减小了当反相电路转变到高电平状态时的延迟，而不会影响转换到低电平的时序。
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公开(公告)号：US20050156642A1
公开(公告)日：2005-07-21
申请号：US10759339
申请日：2004-01-16
IPC分类号： H03K19/017 , H03B1/00
CPC分类号： H03K19/01707
摘要： An invention is provided for a feed forward circuit that reduces delay through an inverting circuit. The feed forward circuit includes an inverter having an input and an output, and an inverting circuit having an input and an output. The input of the inverting circuit is coupled to the output of the inverter. A feed forward transistor having a gate coupled to the input of the inverter and a terminal coupled to the output of the inverting circuit also is included. In operation the feed forward transistor decreases the amount of time required for the output of the inverting circuit to change state. In sum, the invention reduces the delay when the inverting circuit transitions to a high state, without affecting the timing of the transition to a low state.
摘要翻译： 提供了一种用于减少通过反相电路的延迟的前馈电路的发明。 前馈电路包括具有输入和输出的反相器和具有输入和输出的反相电路。 反相电路的输入耦合到逆变器的输出端。 还包括具有耦合到反相器的输入端的栅极和耦合到反相电路的输出的端子的前馈晶体管。 在操作中，前馈晶体管减小了反相电路的输出改变状态所需的时间量。 总之，本发明减小了当反相电路转变到高电平状态时的延迟，而不会影响转换到低电平的时序。
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公开(公告)号：US20050024101A1
公开(公告)日：2005-02-03
申请号：US10630949
申请日：2003-07-29
IPC分类号： H03K19/003 , H03B1/00
CPC分类号： H03K19/00315
摘要： An invention is disclosed for protecting an input buffer. A current from a p-supply to an input buffer is lowered when an input voltage to the input buffer is tolerant HIGH. The p-supply being a VDD voltage supplied to a p-channel transistor in the input buffer. In addition, the p-supply is set to a particular voltage when the input voltage to the input buffer is LOW, the particular voltage being at a specific value such that input transistors within the input buffer do not experience overstress voltages. Optionally, p-supply can be prevented from supplying current to the input buffer when an input voltage to the input buffer is tolerant HIGH.
摘要翻译： 公开了一种用于保护输入缓冲器的发明。 当输入缓冲器的输入电压容限为高电平时，从p电源到输入缓冲器的电流降低。 p电源是提供给输入缓冲器中的p沟道晶体管的VDD电压。 此外，当输入缓冲器的输入电压为低电平时，p电源被设置为特定电压，特定电压处于特定值，使得输入缓冲器内的输入晶体管不经历过应力电压。 可选地，当输入缓冲器的输入电压容限为高电平时，可以防止p电源向输入缓冲器提供电流。
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