公开(公告)号：US07955960B2

公开(公告)日：2011-06-07

申请号：US12052914

申请日：2008-03-21

申请人： Se Jun Kim ,  Eun Seok Choi ,  Kyoung Hwan Park ,  Hyun Seung Yoo ,  Myung Shik Lee ,  Young Ok Hong ,  Jung Ryul Ahn ,  Yong Top Kim ,  Kyung Pil Hwang ,  Won Sic Woo ,  Jae Young Park ,  Ki Hong Lee ,  Ki Seon Park ,  Moon Sig Joo

发明人： Se Jun Kim ,  Eun Seok Choi ,  Kyoung Hwan Park ,  Hyun Seung Yoo ,  Myung Shik Lee ,  Young Ok Hong ,  Jung Ryul Ahn ,  Yong Top Kim ,  Kyung Pil Hwang ,  Won Sic Woo ,  Jae Young Park ,  Ki Hong Lee ,  Ki Seon Park ,  Moon Sig Joo

IPC分类号： H01L21/336

CPC分类号： H01L29/513 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/792

摘要： A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.

摘要翻译： 提供了一种非易失性存储器件及其制造方法，以防止存储在电荷陷阱层中的电荷移动到相邻存储器单元。 制造非易失性存储器件的方法包括在半导体衬底上形成第一电介质层，其中有源区由隔离层限定，在第一电介质层上形成电荷陷阱层，去除第一介电层和电荷陷阱层 在隔离层上，在包括电荷陷阱层的隔离层上形成第二电介质层，并在第二介电层上形成导电层。

公开(公告)号：US08377782B2

公开(公告)日：2013-02-19

申请号：US13338048

申请日：2011-12-27

申请人： Young Ok Hong ,  Myung Shik Lee

发明人： Young Ok Hong ,  Myung Shik Lee

IPC分类号： H01L29/72

CPC分类号： H01L29/7881 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568

摘要： A method for fabricating a non-volatile memory device with asymmetric source/drain junctions, wherein a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.

摘要翻译： 一种用于制造具有不对称源极/漏极结的非易失性存储器件的方法，其中在半导体衬底上形成栅极堆叠，并且以预定角度注入杂质离子以在半导体衬底中形成源极/漏极结。 半导体衬底的热处理在相邻栅极叠层之间形成不对称设置的源极/漏极结。

公开(公告)号：US20090096011A1

公开(公告)日：2009-04-16

申请号：US12132386

申请日：2008-06-03

申请人： Young Ok Hong ,  Myung Shik Lee

发明人： Young Ok Hong ,  Myung Shik Lee

IPC分类号： H01L29/00 ,  H01L21/336

CPC分类号： H01L29/7881 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568

摘要： Disclosed herein are non-volatile memory devices with asymmetric source/drain junctions and a method for fabricating the same. According to the method, a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.

摘要翻译： 本文公开了具有不对称源极/漏极结的非易失性存储器件及其制造方法。 根据该方法，在半导体衬底上形成栅极堆叠，并且以预定角度注入杂质离子，以在半导体衬底中形成源极/漏极结。 半导体衬底的热处理在相邻栅极叠层之间形成不对称设置的源极/漏极结。

公开(公告)号：US08110866B2

公开(公告)日：2012-02-07

申请号：US12132386

申请日：2008-06-03

申请人： Young Ok Hong ,  Myung Shik Lee

发明人： Young Ok Hong ,  Myung Shik Lee

IPC分类号： H01L29/72

CPC分类号： H01L29/7881 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568

摘要： Disclosed herein are non-volatile memory devices with asymmetric source/drain junctions and a method for fabricating the same. According to the method, a gate stack is formed on a semiconductor substrate, and impurity ions are implanted at a predetermined angle to form a source/drain junction in the semiconductor substrate. Thermal treatment of the semiconductor substrate forms an asymmetrically disposed source/drain junction between adjacent gate stacks.

摘要翻译： 本文公开了具有不对称源极/漏极结的非易失性存储器件及其制造方法。 根据该方法，在半导体衬底上形成栅极堆叠，并且以预定角度注入杂质离子，以在半导体衬底中形成源极/漏极结。 半导体衬底的热处理在相邻栅极叠层之间形成不对称设置的源极/漏极结。

公开(公告)号：US08203177B2

公开(公告)日：2012-06-19

申请号：US12857678

申请日：2010-08-17

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L29/76

CPC分类号： G11C16/0483 ,  G11C5/02 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

摘要： A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

摘要翻译： 闪存器件包括衬底; 具有用于提供结区域和沟道区域的半导体层和用于绝缘半导体层的层间隔离层的电池堆，其中半导体层和层间隔离层被重复堆叠; 门列的阵列，栅极柱穿过电池堆，垂直于衬底; 以及引入到栅极列和电池堆之间的接口中的陷阱层叠堆积以存储电荷。

公开(公告)号：US08338874B2

公开(公告)日：2012-12-25

申请号：US13469206

申请日：2012-05-11

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L29/76

CPC分类号： G11C16/0483 ,  G11C5/02 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

摘要： A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

公开(公告)号：US20100308398A1

公开(公告)日：2010-12-09

申请号：US12857678

申请日：2010-08-17

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L29/792

CPC分类号： G11C16/0483 ,  G11C5/02 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

摘要： A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

摘要翻译： 闪存器件包括衬底; 具有用于提供结区域和沟道区域的半导体层和用于绝缘半导体层的层间隔离层的电池堆，其中半导体层和层间隔离层被重复堆叠; 门列的阵列，栅极柱穿过电池堆，垂直于衬底; 以及引入到栅极列和电池堆之间的接口中的陷阱层叠堆积以存储电荷。

公开(公告)号：US07799616B2

公开(公告)日：2010-09-21

申请号：US12212819

申请日：2008-09-18

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L21/82

摘要： A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.

公开(公告)号：US20120217572A1

公开(公告)日：2012-08-30

申请号：US13469206

申请日：2012-05-11

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L29/792

CPC分类号： G11C16/0483 ,  G11C5/02 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

摘要： A flash memory device includes a substrate; a cell stack having a semiconductor layer for providing junction areas and channel areas and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked; an array of gate columns, the gate columns penetrating through the cell stack, perpendicular to the substrate; and a trap layered stack introduced into an interface between the gate columns and the cell stack to store charge.

摘要翻译： 闪存器件包括衬底; 具有用于提供结区域和沟道区域的半导体层和用于绝缘半导体层的层间隔离层的电池堆，其中半导体层和层间隔离层被重复堆叠; 门列的阵列，栅极柱穿过电池堆，垂直于衬底; 以及引入到栅极列和电池堆之间的接口中的陷阱层叠堆积以存储电荷。

公开(公告)号：US07867831B2

公开(公告)日：2011-01-11

申请号：US12212819

申请日：2008-09-18

申请人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

发明人： Hack Seob Shin ,  Kyoung Hwan Park ,  Young Ok Hong ,  Yu Jin Park

IPC分类号： H01L21/82

CPC分类号： G11C16/0483 ,  G11C5/02 ,  H01L27/0688 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582

摘要： A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.

摘要翻译： 闪速存储器件包括衬底，具有半导体层的电池堆，其中用于将区域之间设置到沟道区域的结区域形成为条状，以及用于绝缘半导体层的层间隔离层，其中半导体 层和层间隔离层重复堆叠。 闪存器件还包括穿过电池堆的栅极阵列阵列，垂直于衬底并切割穿过接合区域以在其两侧布置接合区域，以及陷阱层叠堆叠引入到栅极柱 和电池堆来存储电荷。