公开(公告)号：US6041062A

公开(公告)日：2000-03-21

申请号：US874358

申请日：1997-06-13

申请人： Seiichi Yamato ,  Noboru Kamei ,  Kazuyoshi Okuma ,  Katsumi Sugawa ,  Hironori Kadota ,  Tomoyuki Sakata

发明人： Seiichi Yamato ,  Noboru Kamei ,  Kazuyoshi Okuma ,  Katsumi Sugawa ,  Hironori Kadota ,  Tomoyuki Sakata

IPC分类号： H04J3/00 ,  H04J3/04 ,  H04J3/06 ,  H04J3/14 ,  H04J3/16 ,  H04Q11/04 ,  G01R31/08 ,  G06F11/00 ,  G08C15/00

CPC分类号： H04J3/14 ,  H04J3/0623 ,  H04J3/0688 ,  H04J3/1611 ,  H04J2203/006

摘要： A high-speed sprchronous multiplexing apparatus has a low-speed device and a high-speed device and employs electrical signals to interface the devices with each other. The low-speed device is connected to a low-speed digital circuit. The high-speed device is connected to a high-speed synchronous multiplexing circuit. The apparatus also has a clock supplier for supplying a reference clock signal that defines a communication rate, to each of the low- and high-speed devices. The apparatus further has an alarm processor for separating faults in the low- and high-speed devices. The low- and high-speed devices are interfaced with each other with the use of the reference clock signal and electrical STM-0/STS-1 signals that employ a frame signal synchronized with the reference clock signal.

摘要翻译： 高速时钟复用装置具有低速装置和高速装置，并且使用电信号将装置彼此连接。 低速设备连接到低速数字电路。 高速设备连接到高速同步复用电路。 该装置还具有用于向每个低速和高速装置提供定义通信速率的参考时钟信号的时钟供应器。 该装置还具有用于分离低速和高速装置中的故障的报警处理器。 低速和高速设备使用参考时钟信号和采用与参考时钟信号同步的帧信号的电STM-0 / STS-1信号彼此接口。

公开(公告)号：US5007044A

公开(公告)日：1991-04-09

申请号：US382413

申请日：1989-07-20

申请人： Seiji Miyoshi ,  Misao Fukuda ,  Seiichi Yamato ,  Kouji Tokiwa ,  Kazuyoshi Maruyama

发明人： Seiji Miyoshi ,  Misao Fukuda ,  Seiichi Yamato ,  Kouji Tokiwa ,  Kazuyoshi Maruyama

IPC分类号： H03H21/00

CPC分类号： H03H21/0043

摘要： Disclosed is a digital adaptive filter and a method of cancelling an echo component generated by a partial return of a transmission signal to a receiving side. The digital adaptive filter comprises: a main memory unit for storing a first echo replica which can be stored or read by using the parallel signal from a main tap unit as an address signal, at least one submemory unit for storing a second echo replica which can be stored or read by using the parallel signal from said subtap unit as an address signal, and an adding circuit for adding the first echo replica and the second echo replica. The second echo replica stored in the at least one submemory unit has a greater precision than the precision of the first echo replica stored in the main memory unit, and thus the accumulated error due to memory division can be reduced. Instead of or accompanied by the greater precision, the contents of the main memory are updated directly based on the error between the pseudo signal and an input signal or based on a step size corresponding to the error, depending on whether the error is relatively large or relatively small, respectively.

公开(公告)号：US5353305A

公开(公告)日：1994-10-04

申请号：US465225

申请日：1990-02-14

申请人： Misao Fukuda ,  Shinji Ohta ,  Seiji Miyoshi ,  Seiichi Yamato ,  Kazuyoshi Maruyama ,  Yutaka Awata ,  Kinji Kawada

发明人： Misao Fukuda ,  Shinji Ohta ,  Seiji Miyoshi ,  Seiichi Yamato ,  Kazuyoshi Maruyama ,  Yutaka Awata ,  Kinji Kawada

IPC分类号： H04B3/23 ,  H03H7/30

CPC分类号： H04B3/145 ,  H04B3/238 ,  H04B3/231 ,  H04B3/235

摘要： An initial gain of an automatic equalizer is fixed to a predetermined value. Then, the most appropriate gain of the automatic equalizer is determined when a training signal is received by the automatic equalizer. An echo replica signal produced by an echo canceler is multiplied by the value obtained by dividing the most appropriate gain by the initial gain. Thus, the echo replica signal is corrected to cancel the echo signal included in the output of the automatic equalizer. The sampling rate of the A/D converter used in the transmitter and receiver is shifted by a predetermined value from the transmission line rate at an initial training stage. Thereafter, the sampling rate of the A/D converter is determined to be near that of the transmission line.

摘要翻译： PCT No.PCT / JP89 / 00595 Sec。 371 1990年2月14日第 102（e）1990年2月14日PCT PCT。1989年6月14日PCT公布。 第WO89 / 12934号公报 日期为1989年12月28日。自动均衡器的初始增益固定为预定值。 然后，当自动均衡器接收到训练信号时，确定自动均衡器最合适的增益。 由回波消除器产生的回波复制信号乘以通过将最适当的增益除以初始增益而获得的值。 因此，校正回波复制信号以消除包括在自动均衡器的输出中的回波信号。 在发射机和接收机中使用的A / D转换器的采样率在初始训练阶段从传输线路速率偏移预定值。 此后，A / D转换器的采样率被确定为接近传输线的采样率。