摘要:
The analog-to-digital converter array 13 includes one analog-to-digital converter 210 for each row of photodetectors 120 in the photodetector array 11. The image-processing unit 14 includes the plurality of processing circuits 400 for performing high-speed image processing. The signal converter 17 combines the output signals from the analog-to-digital converter array 13 with output signals from the image-processing unit 14. Under control of the control circuit 15 and the signal conversion controller 19, the signal converter 17 downconverts the composite signal at an important timing to a frame rate suitable for display on the monitor 18 and subsequently displays the signal on the monitor 18.
摘要:
A current signal corresponding to the amount of incident light detected by a photoelectric conversion device 13 is inputted to and integrated by an integrator circuit 30, whereby a voltage signal is outputted from the integrator circuit 30. When a switch 40 is closed, the voltage signal outputted from the integrator circuit 30 is inputted to a capacitor 51 of a variable capacity integrator circuit 50, a change of the voltage signal is inputted to an amplifier 52, and an electric charge corresponding to the change of voltage signal and the capacity value of a variable capacity part 53 flows into the variable capacity part 53. The capacity value of the variable capacity part 53 is controlled by a comparator 60 and a capacity control section 70 such that the value of integrated signal outputted from the variable capacity integrator circuit 50 coincide with a reference value. The capacity control section 70 outputs a first digital signal corresponding to the capacity value of the variable capacity part 53. As a consequence, a solid-state imaging device which is excellent in S/N ratio, yields no offset errors even when its amplifier have offset fluctuations, and has a small circuit scale is obtained.