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公开(公告)号：US10164091B1
公开(公告)日：2018-12-25
申请号：US15666814
申请日：2017-08-02
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Gary Horst Loechelt
IPC: H01L29/78 , H01L27/06 , H01L23/528 , H01L29/06
Abstract: A circuit can include a field-effect transistor having a body, a drain, a gate, and a source. In an embodiment, the circuit can further include a bipolar transistor having a base and a collector, wherein the collector of the bipolar transistor is coupled to the body of the field-effect transistor; and the drain of the field-effect transistor is coupled to the base of the bipolar transistor. In another embodiment, the circuit can include a diode having an anode and a cathode, wherein the source of the field-effect transistor is coupled to the anode of the diode, and the gate of the field effect transistor is coupled to the cathode of the diode. In another aspect, an electronic device can include one or more physical structures that correspond to components within the circuits.
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公开(公告)号：US11552017B2
公开(公告)日：2023-01-10
申请号：US17248426
申请日：2021-01-25
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Prasad Venkatraman , Gary Horst Loechelt
IPC: H01L23/528 , H01L29/40 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/739
Abstract: In a general aspect, a transistor can include a trench disposed in a semiconductor region and a gate electrode disposed in an upper portion of the trench. The gate electrode can include a first and second gate electrode segments. The transistor can also include a shield electrode having a first shield electrode portion disposed in a lower portion of the trench, and a second shield electrode portion orthogonally extending from the first shield electrode portion in the lower portion of the trench to the upper portion of the trench. The first shield electrode portion can be disposed below the first and second gate electrode segments, and the second shield electrode portion can being disposed between the first and second gate electrode segments. The transistor can also include a patterned buried conductor layer. The first and second gate electrode segments can be electrically coupled via the patterned buried conductor layer.
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公开(公告)号：US11411077B2
公开(公告)日：2022-08-09
申请号：US17016708
申请日：2020-09-10
Applicant: Semiconductor Components Industries, LLC
Inventor： Gary Horst Loechelt , Balaji Padmanabhan , Dean E. Probst , Tirthajyoti Sarkar , Prasad Venkatraman , Muh-Ling Ger
Abstract: An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device.
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公开(公告)号：US20220077290A1
公开(公告)日：2022-03-10
申请号：US17016682
申请日：2020-09-10
Applicant: Semiconductor Components Industries, LLC
Inventor： Gary Horst Loechelt , Balaji Padmanabhan , Dean E. Probst , Tirthajyoti Sarkar , Prasad Venkatraman , Muh-Ling Ger
IPC: H01L29/40 , H01L23/528 , H01L29/06 , H01L29/10 , H01L29/739
Abstract: A circuit and physical structure can help to counteract non-linear COSS associated with power transistors that operate at higher switching speeds and lower RDSON. In an embodiment, a component with a pn junction can be coupled to an n-channel IGFET. The component can include a p-channel IGFET, a pnp bipolar transistor, or both. A gate/capacitor electrode can be within a trench that is adjacent to the active regions of the component and n-channel IGFET, where the active regions can be within a semiconductor pillar. The combination of a conductive member and the semiconductor pillar of the component can be a charge storage component. The physical structure may include a compensation region, a barrier doped region, or both. In a particular embodiment, doped surface regions can be coupled to a buried conductive region without the use of a topside interconnect or a deep collector type of structure.
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Patent Agency Ranking
公开(公告)号：US11710767B2
公开(公告)日：2023-07-25
申请号：US17248387
申请日：2021-01-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Gary Horst Loechelt
CPC classification number: H01L29/0607 , H01L27/0727 , H01L28/40
Abstract: In a general aspect, a semiconductor device can include a semiconductor region, an active region disposed in the semiconductor region, and a termination region disposed on the semiconductor region and adjacent to the active region. The termination region can include a trench having a conductive material disposed therein. The termination region can further include a first cavity separating the trench from the semiconductor region. A portion of the first cavity can be disposed between a bottom of the trench and the semiconductor region. The termination region can also include a second cavity separating the trench from the semiconductor region.
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公开(公告)号：US20220077282A1
公开(公告)日：2022-03-10
申请号：US17016708
申请日：2020-09-10
Applicant: Semiconductor Components Industries, LLC
Inventor： Gary Horst Loechelt , Balaji Padmanabhan , Dean E. Probst , Tirthajyoti Sarkar , Prasad Venkatraman , Muh-Ling Ger
Abstract: An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device.
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公开(公告)号：US11728331B2
公开(公告)日：2023-08-15
申请号：US17248390
申请日：2021-01-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Gary Horst Loechelt , Marco Fuhrmann
CPC classification number: H01L27/0629 , H01L28/20 , H01L28/40
Abstract: In a general aspect, a semiconductor device can include a semiconductor region, an active region disposed in the semiconductor region, a termination region disposed on the semiconductor region and adjacent to the active region, and a resistor disposed in the termination region. The resistor can include a trench, a conductive material disposed in the trench, and a first cavity separating the trench from the semiconductor region. A portion of the first cavity can be disposed between a bottom of the trench and the semiconductor region. The resistor can further include a second cavity separating the trench from the semiconductor region.
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公开(公告)号：US11621331B2
公开(公告)日：2023-04-04
申请号：US17016682
申请日：2020-09-10
Applicant: Semiconductor Components Industries, LLC
Inventor： Gary Horst Loechelt , Balaji Padmanabhan , Dean E. Probst , Tirthajyoti Sarkar , Prasad Venkatraman , Muh-Ling Ger
IPC: H01L29/40 , H01L23/528 , H01L29/739 , H01L29/10 , H01L29/06
Abstract: A circuit and physical structure can help to counteract non-linear COSS associated with power transistors that operate at higher switching speeds and lower RDSON. In an embodiment, a component with a pn junction can be coupled to an n-channel IGFET. The component can include a p-channel IGFET, a pnp bipolar transistor, or both. A gate/capacitor electrode can be within a trench that is adjacent to the active regions of the component and n-channel IGFET, where the active regions can be within a semiconductor pillar. The combination of a conductive member and the semiconductor pillar of the component can be a charge storage component. The physical structure may include a compensation region, a barrier doped region, or both. In a particular embodiment, doped surface regions can be coupled to a buried conductive region without the use of a topside interconnect or a deep collector type of structure.
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公开(公告)号：US20220238512A1
公开(公告)日：2022-07-28
申请号：US17248390
申请日：2021-01-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor： Gary Horst Loechelt , Marco Fuhrmann
Abstract: In a general aspect, a semiconductor device can include a semiconductor region, an active region disposed in the semiconductor region, a termination region disposed on the semiconductor region and adjacent to the active region, and a resistor disposed in the termination region. The resistor can include a trench, a conductive material disposed in the trench, and a first cavity separating the trench from the semiconductor region. A portion of the first cavity can be disposed between a bottom of the trench and the semiconductor region. The resistor can further include a second cavity separating the trench from the semiconductor region.
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