公开(公告)号：US09092042B2

公开(公告)日：2015-07-28

申请号：US13908121

申请日：2013-06-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tsuji ,  Kaori Ikada

IPC: G05F3/16 ,  G05F1/00 ,  G05F1/56 ,  G05F3/24

CPC classification number: G05F3/16 ,  G05F1/56 ,  G05F3/242

Abstract: One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.

Abstract translation: 本发明的一个目的是提供一种具有改善的噪声容限的调节器电路。 在包括基于第一电源端子和第二电源端子之间的电位差产生参考电压的偏置电路的调节器电路中，以及基于参考电位向输出端子输出电位的电压调节器 在偏置电路的输入端，在电源端子与偏置电路中包含的晶体管的栅极连接的节点之间设置有旁路电容器。