公开(公告)号：US20140085758A1

公开(公告)日：2014-03-27

申请号：US14115210

申请日：2011-05-27

申请人： Sergey Sofer ,  Moty Groissman ,  Valery Neiman

发明人： Sergey Sofer ,  Moty Groissman ,  Valery Neiman

IPC分类号： H01L23/34 ,  H01L23/60

CPC分类号： H01L23/34 ,  H01L23/60 ,  H01L27/0248 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit device comprising at least one electrostatic discharge (ESD) clamp device. The at least one ESD clamp device comprises a first channel input, a second channel input, and a control input arranged to receive a control signal. The at least one ESD clamp device is arranged to selectively operate in a conductive state in which the at least one ESD clamp device permits current to flow between the first and second channel inputs thereof based at least partly on the received control signal. The integrated circuit device further comprises at least one biasing module. The at least one biasing module comprises at least one output operably coupled to the control input of the at least one ESD clamp device and at least one input arranged to receive a thermal regulation signal. The at least one biasing module being arranged to apply a bias to the control signal for the at least one ESD clamp device based at least partly on the received thermal regulation signal.

摘要翻译： 一种包括至少一个静电放电（ESD）钳位装置的集成电路装置。 所述至少一个ESD钳位装置包括第一通道输入，第二通道输入和布置成接收控制信号的控制输入。 所述至少一个ESD钳位装置被布置成选择性地在导电状态下工作，其中所述至少一个ESD钳位装置允许电流至少部分地基于所接收的控制信号而在其第一和第二通道输入之间流动。 集成电路装置还包括至少一个偏置模块。 所述至少一个偏置模块包括可操作地耦合到所述至少一个ESD钳位装置的控制输入的至少一个输出和布置成接收热调节信号的至少一个输入。 所述至少一个偏置模块被布置成至少部分地基于所接收的热调节信号，将至少一个ESD钳位装置的控制信号施加偏压。

公开(公告)号：US09117787B2

公开(公告)日：2015-08-25

申请号：US14115210

申请日：2011-05-27

申请人： Sergey Sofer ,  Moty Groissman ,  Valery Neiman

发明人： Sergey Sofer ,  Moty Groissman ,  Valery Neiman

IPC分类号： H01L23/34 ,  H01L23/60 ,  H01L27/02

CPC分类号： H01L23/34 ,  H01L23/60 ,  H01L27/0248 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit device comprising at least one electrostatic discharge (ESD) clamp device. The at least one ESD clamp device comprises a first channel input, a second channel input, and a control input arranged to receive a control signal. The at least one ESD clamp device is arranged to selectively operate in a conductive state in which the at least one ESD clamp device permits current to flow between the first and second channel inputs thereof based at least partly on the received control signal. The integrated circuit device further comprises at least one biasing module. The at least one biasing module comprises at least one output operably coupled to the control input of the at least one ESD clamp device, and at least one input arranged to receive a thermal regulation signal. The at least one biasing module being arranged to apply a bias to the control signal for the at least one ESD clamp device based at least partly on the received thermal regulation signal.

摘要翻译： 一种包括至少一个静电放电（ESD）钳位装置的集成电路装置。 所述至少一个ESD钳位装置包括第一通道输入，第二通道输入和布置成接收控制信号的控制输入。 所述至少一个ESD钳位装置被布置成选择性地在导电状态下工作，其中所述至少一个ESD钳位装置允许电流至少部分地基于所接收的控制信号而在其第一和第二通道输入之间流动。 集成电路装置还包括至少一个偏置模块。 所述至少一个偏置模块包括可操作地耦合到所述至少一个ESD钳位装置的控制输入的至少一个输出，以及布置成接收热调节信号的至少一个输入。 所述至少一个偏置模块被布置成至少部分地基于所接收的热调节信号，将至少一个ESD钳位装置的控制信号施加偏压。

公开(公告)号：US20140077856A1

公开(公告)日：2014-03-20

申请号：US14115710

申请日：2011-05-27

申请人： Sergey Sofer ,  Moty Groissman ,  Eyal Melamed-Kohen ,  Naom Sivam

发明人： Sergey Sofer ,  Moty Groissman ,  Eyal Melamed-Kohen ,  Naom Sivam

IPC分类号： H03K3/011

CPC分类号： H03K3/011 ,  G06F1/206 ,  H03K3/0375 ,  Y02D10/16

摘要： An integrated circuit device comprises a first clock signal source, arranged to provide at least one first clock signal; a second clock signal source, arranged to provide at least one second clock signal different from the at least one first clock signal; and a plurality of sequential logic cells, at least one of the plurality connected to receive, in a first mode, the at least one first clock signal or at least one clock signal derived from the at least one first clock signal, and to receive, in a second mode, the at least one second clock signal or at least one clock signal derived from the at least one second clock signal; wherein in the second mode the at least one second clock signal is adapted to the at least one of the plurality of sequential logic cells to generate in at least a portion of the integrated circuit device a current consumption when the at least one first clock signal is not a toggling signal.

摘要翻译： 集成电路装置包括第一时钟信号源，被布置成提供至少一个第一时钟信号; 第二时钟信号源，被布置成提供与所述至少一个第一时钟信号不同的至少一个第二时钟信号; 以及多个顺序逻辑单元，所述多个顺序逻辑单元中的至少一个连接成以第一模式接收所述至少一个第一时钟信号或从所述至少一个第一时钟信号导出的至少一个时钟信号， 在第二模式中，所述至少一个第二时钟信号或从所述至少一个第二时钟信号导出的至少一个时钟信号; 其中在所述第二模式中，所述至少一个第二时钟信号适用于所述多个顺序逻辑单元中的至少一个，以在所述至少一个第一时钟信号为 不是切换信号。

公开(公告)号：US20110291740A1

公开(公告)日：2011-12-01

申请号：US12787457

申请日：2010-05-26

申请人： Sergey Sofer ,  Eyal Melamed-Kohen ,  Valery Neiman

发明人： Sergey Sofer ,  Eyal Melamed-Kohen ,  Valery Neiman

IPC分类号： H03K17/00

CPC分类号： H03K19/0016

摘要： An integrated circuit, that includes: (i) a power gating switch, the power gating switch includes (a) an input port for receiving an input supply voltage; (b) an output port for outputting an output supply voltage; and (c) a control port for receiving a control signal that determines a difference between a value of the input supply voltage and a value of the output supply voltage; (ii) a power gated circuit, coupled to the output port of the switch, for receiving the output supply voltage; (iii) a mode indicator generator for generating a mode indicator that indicates of a desired mode of the power gated circuit; (iv) a leakage indicator generator for generating a leakage indicator that indicates of a leakage level of the power gated circuit; and (iv) a control circuit, for receiving the mode indicator and the leakage indicator, and for selecting the value of the control signal based on the mode indicator and on the leakage indicator.

摘要翻译： 一种集成电路，包括：（i）电源门控开关，电源门控开关包括（a）用于接收输入电源电压的输入端口; （b）用于输出输出电源电压的输出端口; 和（c）控制端口，用于接收确定输入电源电压值与输出电源电压值之间的差的控制信号; （ii）耦合到开关的输出端口的电源门控电路，用于接收输出电源电压; （iii）模式指示器发生器，用于产生指示电力门控电路的期望模式的模式指示器; （iv）泄漏指示器发生器，用于产生指示电力门控电路的泄漏电平的泄漏指示器; 以及（iv）控制电路，用于接收模式指示器和泄漏指示器，并且用于基于模式指示器和泄漏指示器来选择控制信号的值。

公开(公告)号：US09263433B2

公开(公告)日：2016-02-16

申请号：US14359695

申请日：2011-11-22

申请人： Sergey Sofer ,  Valery Neiman ,  Michael Priel

发明人： Sergey Sofer ,  Valery Neiman ,  Michael Priel

IPC分类号： H02H3/22 ,  H01L27/02 ,  H01L23/04 ,  H01L23/50 ,  H02H9/04 ,  H05K1/02

CPC分类号： H01L27/0285 ,  H01L23/04 ,  H01L23/50 ,  H01L2924/0002 ,  H02H9/04 ,  H02H9/046 ,  H05K1/0259 ,  H01L2924/00

摘要： An integrated circuit comprising a power supply node, a ground node and a gated domain coupled between the power node and the ground node. A Charged Device Model electrostatic discharge protection module is provided for shunting electrical energy of a CDM ESD event away from the gated domain. A gating switch makes an electrical connection in a connected state between the gated domain and at least one of the power node and the ground node. ESD gating control circuitry is coupled to the CDM ESD protection module and controls shunting of energy away from the gated domain by the CDM ESD protection module, thereby avoiding the energy flowing through the gated domain. The ESD gating control circuitry inhibits actuation of the CDM ESD protection module to prevent response to CDM ESD events when the gating domain is powered-up.

摘要翻译： 一种集成电路，包括电源节点，接地节点和耦合在功率节点和接地节点之间的选通域。 带电装置型号的静电放电保护模块用于将CDM ESD事件的电能与门控域分开。 选通开关在门控域与功率节点和接地节点中的至少一个之间的连接状态下进行电连接。 ESD选通控制电路耦合到CDM ESD保护模块，并通过CDM ESD保护模块控制远离门控域的能量分流，从而避免流过门控域的能量。 ESD选通控制电路禁止CDM ESD保护模块的启动，以防止在门控域加电时对CDM ESD事件的响应。

公开(公告)号：US07956594B2

公开(公告)日：2011-06-07

申请号：US11994754

申请日：2005-07-05

申请人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

发明人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

IPC分类号： G05F1/575

CPC分类号： G11C29/02 ,  G05F1/56 ,  G11C5/025 ,  G11C5/147 ,  G11C29/021 ,  G11C29/028

摘要： A device that includes a voltage supply unit and an integrated circuit, the device is characterized by including a voltage sampling circuit adapted to sample voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and wherein the voltage supply unit is adapted to adjust a supply voltage provided to the integrated circuit in response to at least one sampled voltage. A method for voltage drop compensation; the method includes providing a supply voltage to an integrated circuit; the method is characterized by sampling voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and adjusting a supply voltage provided to the integrated circuit in response to at least one sampled voltage.

摘要翻译： 一种包括电压供应单元和集成电路的装置，其特征在于包括：电压采样电路，适于对集成电路内的多个采样点采样电压电平，以提供多个采样电压，其中多个采样电压反映 电压降; 并且其中所述电压供应单元适于响应于至少一个采样电压来调整提供给所述集成电路的电源电压。 一种压降补偿方法; 该方法包括向集成电路提供电源电压; 该方法的特征在于在集成电路内的多个采样点采样电压电平，以提供多个采样电压，其中多个采样电压反映电压降; 以及响应于至少一个采样电压来调整提供给所述集成电路的电源电压。

公开(公告)号：US20080224684A1

公开(公告)日：2008-09-18

申请号：US11994754

申请日：2005-07-05

申请人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

发明人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

IPC分类号： H02J1/00

CPC分类号： G11C29/02 ,  G05F1/56 ,  G11C5/025 ,  G11C5/147 ,  G11C29/021 ,  G11C29/028

摘要： A device that includes a voltage supply unit and an integrated circuit, the device is characterized by including a voltage sampling circuit adapted to sample voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and wherein the voltage supply unit is adapted to adjust a supply voltage provided to the integrated circuit in response to at least one sampled voltage. A method for voltage drop compensation; the method includes providing a supply voltage to an integrated circuit; the method is characterized by sampling voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and adjusting a supply voltage provided to the integrated circuit in response to at least one sampled voltage.

摘要翻译： 一种包括电压供应单元和集成电路的装置，其特征在于包括：电压采样电路，适于对集成电路内的多个采样点采样电压电平，以提供多个采样电压，其中多个采样电压反映 电压降; 并且其中所述电压供应单元适于响应于至少一个采样电压来调整提供给所述集成电路的电源电压。 一种压降补偿方法; 该方法包括向集成电路提供电源电压; 该方法的特征在于在集成电路内的多个采样点采样电压电平，以提供多个采样电压，其中多个采样电压反映电压降; 以及响应于至少一个采样电压调整提供给所述集成电路的电源电压。

公开(公告)号：US20110121818A1

公开(公告)日：2011-05-26

申请号：US13054122

申请日：2008-07-17

申请人： Yefim-Haim Fefer ,  Valery Neiman ,  Sergey Sofer

发明人： Yefim-Haim Fefer ,  Valery Neiman ,  Sergey Sofer

IPC分类号： G01R13/20

CPC分类号： G01R31/31715

摘要： An integrated circuit die comprises an electronic circuit and one or more output ports for outputting signals from the die via an external impedance, to a load, external from the die. The output port is connected to the electronic circuit. The die is further provided with an on-die sampling oscilloscope circuit connected to the output port, for measuring a waveform of the outputted signals.

摘要翻译： 集成电路管芯包括电子电路和一个或多个输出端口，用于将来自管芯的信号经由外部阻抗输出到管芯外部的负载。 输出端口连接到电子电路。 模具还设置有连接到输出端口的管芯采样示波器电路，用于测量输出信号的波形。

公开(公告)号：US07932731B2

公开(公告)日：2011-04-26

申请号：US12278485

申请日：2006-02-09

申请人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

发明人： Sergey Sofer ,  Yehim-Haim Fefer ,  Valery Neiman

IPC分类号： G01R29/26

CPC分类号： G01R29/26 ,  G01R19/16552 ,  G01R31/002

摘要： A device for testing noise immunity of a circuit includes: an analog circuit, an internal stable reference signal source, an internal power supply module to receive a high level voltage supply, and a signal modulator to provide a noisy signal to the power supply module. The power supply module outputs a noisy power supply to the circuit, in response to the noisy signal, and the device outputs a signal representative of a noise immunity of the circuit. A method includes: providing a high level supply voltage to an internal power supply module, receiving signals representative of the performance of an analog circuit, providing a noisy signal to an input of the power supply module, providing a noisy supply voltage to the circuit, by the power supply module, in response to the noisy signal, and evaluating a noise immunity characteristic of the circuit in response to the received signals.

摘要翻译： 用于测试电路的抗噪声的装置包括：模拟电路，内部稳定参考信号源，用于接收高电平电压源的内部电源模块和用于向电源模块提供噪声信号的信号调制器。 电源模块响应于噪声信号向电路输出噪声电源，器件输出代表电路抗噪声的信号。 一种方法包括：向内部电源模块提供高电平电源电压，接收表示模拟电路性能的信号，向电源模块的输入提供噪声信号，向电路提供噪声电源电压， 通过电源模块响应于噪声信号，并且响应于接收到的信号来评估电路的抗噪声特性。

公开(公告)号：US20150270259A1

公开(公告)日：2015-09-24

申请号：US14359695

申请日：2011-11-22

申请人： Sergey Sofer ,  Valery Neiman ,  Michael Priel

发明人： Sergey Sofer ,  Valery Neiman ,  Michael Priel

IPC分类号： H01L27/02 ,  H01L23/50 ,  H01L23/04

CPC分类号： H01L27/0285 ,  H01L23/04 ,  H01L23/50 ,  H01L2924/0002 ,  H02H9/04 ,  H02H9/046 ,  H05K1/0259 ,  H01L2924/00

摘要： An integrated circuit comprising a power supply node, a ground node and a gated domain coupled between the power node and the ground node. A Charged Device Model electrostatic discharge protection module is provided for shunting electrical energy of a CDM ESD event away from the gated domain. A gating switch makes an electrical connection in a connected state between the gated domain and at least one of the power node and the ground node. ESD gating control circuitry is coupled to the CDM ESD protection module and controls shunting of energy away from the gated domain by the CDM ESD protection module, thereby avoiding the energy flowing through the gated domain. The ESD gating control circuitry inhibits actuation of the CDM ESD protection module to prevent response to CDM ESD events when the gating domain is powered-up.

摘要翻译： 一种集成电路，包括电源节点，接地节点和耦合在功率节点和接地节点之间的选通域。 带电装置型号的静电放电保护模块用于将CDM ESD事件的电能与门控域分开。 选通开关在门控域与功率节点和接地节点中的至少一个之间的连接状态下进行电连接。 ESD选通控制电路耦合到CDM ESD保护模块，并通过CDM ESD保护模块控制远离门控域的能量分流，从而避免流过门控域的能量。 ESD选通控制电路禁止CDM ESD保护模块的启动，以防止在门控域加电时对CDM ESD事件的响应。