Apparatus and method of multi-bit programming
    1.
    发明申请
    Apparatus and method of multi-bit programming 有权
    多位编程的装置和方法

    公开(公告)号:US20090103359A1

    公开(公告)日:2009-04-23

    申请号:US12073101

    申请日:2008-02-29

    IPC分类号: G11C16/06 G11C16/04

    摘要: Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may comprise: a multi-bit cell array that includes a first multi-bit cell and a second multi-bit cell; a programming unit for programming first data in the first multi-bit cell, and programming second data in the second multi-bit cell; and a verification unit for verifying whether the first data is programmed in the first multi-bit cell using a first verification voltage, and verifying whether the second data is programmed in the second multi-bit cell using a second verification voltage. The multi-bit programming apparatus may generate better threshold voltage distributions in a multi-bit cell memory.

    摘要翻译: 提供了多位编程设备和/或方法。 多比特编程装置可以包括:包括第一多比特小区和第二多比特小区的多比特单元阵列; 编程单元,用于对第一多位单元中的第一数据进行编程,以及编程第二多位单元中的第二数据; 以及验证单元,用于使用第一验证电压来验证第一数据是否被编程在第一多位单元中,以及使用第二验证电压来验证第二数据是否被编程在第二多位单元中。 多比特编程装置可以在多比特单元存储器中产生更好的阈值电压分布。

    Apparatus and method for multi-bit programming
    2.
    发明申请
    Apparatus and method for multi-bit programming 审中-公开
    多位编程的装置和方法

    公开(公告)号:US20090046510A1

    公开(公告)日:2009-02-19

    申请号:US12007775

    申请日:2008-01-15

    IPC分类号: G11C7/10

    摘要: Multi-bit programming apparatuses and methods are provided. A multi-bit programming apparatus may include: a first programming unit that stores data corresponding to a number of first bits in at least one first memory cell that may be connected to at least one first bit line; and a second programming unit that stores data corresponding to a number of second bits in at least one second memory cell that may be connected to at least one second bit line. Through this, it may be possible to improve data reliability and increase a number of bits to be stored in the entire memory cell.

    摘要翻译: 提供了多位编程设备和方法。 一种多位编程设备可以包括:第一编程单元,其存储对应于可连接到至少一个第一位线的至少一个第一存储器单元中的多个第一位的数据; 以及第二编程单元,其将可能连接到至少一个第二位线的至少一个第二存储器单元中的与第二位数相对应的数据存储。 由此,可以提高数据可靠性并增加要存储在整个存储单元中的位数。

    Apparatus and method of multi-bit programming
    3.
    发明授权
    Apparatus and method of multi-bit programming 有权
    多位编程的装置和方法

    公开(公告)号:US08004886B2

    公开(公告)日:2011-08-23

    申请号:US12073101

    申请日:2008-02-29

    IPC分类号: G11C16/04

    摘要: Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may comprise: a multi-bit cell array that includes a first multi-bit cell and a second multi-bit cell; a programming unit for programming first data in the first multi-bit cell, and programming second data in the second multi-bit cell; and a verification unit for verifying whether the first data is programmed in the first multi-bit cell using a first verification voltage, and verifying whether the second data is programmed in the second multi-bit cell using a second verification voltage. The multi-bit programming apparatus may generate better threshold voltage distributions in a multi-bit cell memory.

    摘要翻译: 提供了多位编程设备和/或方法。 多比特编程装置可以包括:包括第一多比特小区和第二多比特小区的多比特单元阵列; 编程单元,用于对第一多位单元中的第一数据进行编程,以及编程第二多位单元中的第二数据; 以及验证单元,用于使用第一验证电压来验证第一数据是否被编程在第一多位单元中,以及使用第二验证电压来验证第二数据是否被编程在第二多位单元中。 多比特编程装置可以在多比特单元存储器中产生更好的阈值电压分布。

    Error control code apparatuses and methods of using the same
    4.
    发明申请
    Error control code apparatuses and methods of using the same 有权
    错误控制代码设备及其使用方法

    公开(公告)号:US20080276149A1

    公开(公告)日:2008-11-06

    申请号:US11905733

    申请日:2007-10-03

    IPC分类号: G06F11/07

    CPC分类号: G06F11/1008

    摘要: An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an encoding unit that encodes, using a plurality of data outputted from the plurality of ECC encoding controllers, encoding input data into a number of subdata corresponding to the ECC control signal. In addition or in the alternative, the ECC apparatus may include: a plurality of ECC decoding controllers that output data respectively inputted via the storage elements corresponding to the ECC control signal; and/or a decoding unit that decodes, using a plurality of data outputted from the plurality of ECC decoding controllers, a number of decoding input data corresponding to the ECC control signal into one piece of output data.

    摘要翻译: 错误控制码(ECC)装置可以包括基于频道信息产生ECC控制信号的控制信号发生器。 ECC装置还可以包括:多个ECC编码控制器,其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或编码单元,其使用从所述多个ECC编码控制器输出的多个数据,将输入数据编码为对应于所述ECC控制信号的多个子数据进行编码。 另外或者可选地,ECC装置可以包括:多个ECC解码控制器,其输出经由与ECC控制信号对应的存储元件分别输入的数据; 和/或解码单元,其使用从所述多个ECC解码控制器输出的多个数据将对应于所述ECC控制信号的多个解码输入数据解码为一条输出数据。

    Error control code apparatuses and methods of using the same
    5.
    发明授权
    Error control code apparatuses and methods of using the same 有权
    错误控制代码设备及其使用方法

    公开(公告)号:US08112693B2

    公开(公告)日:2012-02-07

    申请号:US11905734

    申请日:2007-10-03

    IPC分类号: G11C29/00

    CPC分类号: G06F11/1072

    摘要: An Error Control Code (ECC) apparatus applied to a memory of a Multi-Level Cell (MLC) method may include: a bypass control signal generator generating a bypass control signal; and an ECC performing unit that may include at least two ECC decoding blocks, determining whether to bypass a portion of the at least two ECC decoding blocks based on the bypass control signal, and/or performing an ECC decoding. In addition or in the alternative, the ECC performing unit may include at least two ECC encoding blocks, determining whether to bypass a portion of the at least two ECC encoding blocks based on the bypass control signal, and/or performing an ECC encoding. An ECC method applied to a memory of a MLC method and a computer-readable recording medium storing a program for implementing an EEC method applied to a memory of a MLC method are also disclose.

    摘要翻译: 应用于多电平单元(MLC)方法的存储器的错误控制码(ECC)装置可以包括:旁路控制信号发生器,其生成旁路控制信号; 以及ECC执行单元,其可以包括至少两个ECC解码块,基于旁路控制信号确定是否绕过所述至少两个ECC解码块的一部分,和/或执行ECC解码。 另外或在替代方案中,ECC执行单元可以包括至少两个ECC编码块,基于旁路控制信号确定是否绕过至少两个ECC编码块的一部分,和/或执行ECC编码。 还公开了应用于MLC方法的存储器的ECC方法和存储用于实现应用于MLC方法的存储器的EEC方法的程序的计算机可读记录介质。

    Apparatus and method of multi-bit programming
    6.
    发明授权
    Apparatus and method of multi-bit programming 有权
    多位编程的装置和方法

    公开(公告)号:US07983082B2

    公开(公告)日:2011-07-19

    申请号:US12081453

    申请日:2008-04-16

    CPC分类号: G11C11/5628

    摘要: A multi-bit programming apparatus may include a first control unit that may generates 2N threshold voltage states based on a target bit error rate (BER) of each of the page programming operations, a second control unit that may assign any one of the threshold voltage states to the N-bit data, and a programming unit that may program the assigned threshold voltage state in each of the at least one multi-bit cell to program the N-bit data.

    摘要翻译: 多位编程装置可以包括第一控制单元,其可以基于每个页面编程操作的目标误码率(BER)产生2N个阈值电压状态;第二控制单元,其可以分配阈值电压 状态到N位数据,以及编程单元,其可以对所述至少一个多位单元中的每一个中的分配的阈值电压状态进行编程以编程N位数据。

    Apparatus and method of multi-bit programming
    7.
    发明申请
    Apparatus and method of multi-bit programming 有权
    多位编程的装置和方法

    公开(公告)号:US20090091990A1

    公开(公告)日:2009-04-09

    申请号:US12081453

    申请日:2008-04-16

    IPC分类号: G11C7/00

    CPC分类号: G11C11/5628

    摘要: Disclosed are a multi-bit programming apparatus and a multi-bit programming method. The multi-bit programming apparatus may include a first control unit that may generates 2N threshold voltage states based on a target bit error rate (BER) of each of the page programming operations, a second control unit that may assign any one of the threshold voltage states to the N-bit data, and a programming unit that may program the assigned threshold voltage state in each of the at least one multi-bit cell to program the N-bit data.

    摘要翻译: 公开了一种多位编程装置和多位编程方法。 多位编程设备可以包括第一控制单元,其可以基于每个页面编程操作的目标误码率(BER)产生2N个阈值电压状态;第二控制单元,其可以分配阈值电压 状态到N位数据,以及编程单元,其可以对所述至少一个多位单元中的每一个中的分配的阈值电压状态进行编程以编程N位数据。

    Memory data detecting apparatus and method for controlling reference voltage based on error in stored data
    8.
    发明授权
    Memory data detecting apparatus and method for controlling reference voltage based on error in stored data 有权
    存储器数据检测装置和基于存储数据中的误差来控制参考电压的方法

    公开(公告)号:US07929346B2

    公开(公告)日:2011-04-19

    申请号:US12216745

    申请日:2008-07-10

    IPC分类号: G11C16/06 G11C16/34 G11C16/26

    摘要: Example embodiments may relate to a method and an apparatus for reading data stored in a memory, for example, providing a method and an apparatus for controlling a reference voltage based on an error of the stored data. Example embodiments may provide a memory data detecting apparatus including a first voltage comparator to compare a threshold voltage of a memory cell with a first reference voltage, a first data determiner to determine a value of at least one data bit stored in the memory cell according to a result of the comparison, an error verifier to verify whether an error occurs in the determined value, a reference voltage determiner to determine a second reference voltage that is lower than the first reference voltage based on a result of the verification, and a second data determiner to re-determine the value of the data based on the determined second reference voltage.

    摘要翻译: 示例性实施例可以涉及用于读取存储在存储器中的数据的方法和装置,例如提供一种基于存储的数据的错误来控制参考电压的方法和装置。 示例性实施例可以提供一种存储器数据检测装置,其包括用于将存储器单元的阈值电压与第一参考电压进行比较的第一电压比较器,第一数据确定器,用于根据存储器单元存储的至少一个数据位的值,根据 比较结果,用于验证所确定的值是否发生错误验证器,基于验证结果确定低于第一参考电压的第二参考电压的参考电压确定器,以及第二数据 确定器,以基于所确定的第二参考电压重新确定数据的值。

    Memory data detecting apparatus and method for controlling reference voltage based on error in stored data
    10.
    发明申请
    Memory data detecting apparatus and method for controlling reference voltage based on error in stored data 有权
    存储器数据检测装置和基于存储数据中的误差来控制参考电压的方法

    公开(公告)号:US20090207671A1

    公开(公告)日:2009-08-20

    申请号:US12216745

    申请日:2008-07-10

    IPC分类号: G11C7/00 G11C29/04

    摘要: Example embodiments may relate to a method and an apparatus for reading data stored in a memory, for example, providing a method and an apparatus for controlling a reference voltage based on an error of the stored data. Example embodiments may provide a memory data detecting apparatus including a first voltage comparator to compare a threshold voltage of a memory cell with a first reference voltage, a first data determiner to determine a value of at least one data bit stored in the memory cell according to a result of the comparison, an error verifier to verify whether an error occurs in the determined value, a reference voltage determiner to determine a second reference voltage that is lower than the first reference voltage based on a result of the verification, and a second data determiner to re-determine the value of the data based on the determined second reference voltage.

    摘要翻译: 示例性实施例可以涉及用于读取存储在存储器中的数据的方法和装置,例如提供一种基于存储的数据的错误来控制参考电压的方法和装置。 示例性实施例可以提供一种存储器数据检测装置,其包括用于将存储器单元的阈值电压与第一参考电压进行比较的第一电压比较器,第一数据确定器,用于根据存储器单元存储的至少一个数据位的值,根据 比较结果,用于验证所确定的值是否发生错误验证器,基于验证结果确定低于第一参考电压的第二参考电压的参考电压确定器,以及第二数据 确定器,以基于所确定的第二参考电压重新确定数据的值。