公开(公告)号：US20120013554A1

公开(公告)日：2012-01-19

申请号：US13177130

申请日：2011-07-06

申请人： Seunghee NAM ,  Namkook Kim ,  Youngki Jung

发明人： Seunghee NAM ,  Namkook Kim ,  Youngki Jung

IPC分类号： G06F3/041 ,  B05D3/00 ,  B05D5/12

CPC分类号： G06F3/044

摘要： A touch screen panel and a method of manufacturing the same are disclosed. The touch screen panel includes a substrate, an electrode forming part positioned on the substrate, and a routing wiring part positioned on the substrate outside the electrode forming part. The electrode forming part includes a plurality of first electrode serials arranged parallel to one another in a first direction and a plurality of second electrode serials arranged to cross the first electrode serials. The routing wiring part includes a plurality of first routing wires respectively connected to the first electrode serials and a plurality of second routing wires respectively connected to the second electrode serials. A plurality of first connection patterns are formed on the same level layer as the first and second routing wires to be separated from one another.

摘要翻译： 公开了触摸屏面板及其制造方法。 触摸屏面板包括基板，位于基板上的电极形成部分和位于电极形成部分外部的基板上的布线布线部分。 电极形成部分包括在第一方向上彼此平行布置的多个第一电极串联和布置成跨越第一电极序列的多个第二电极序列。 路由布线部分包括分别连接到第一电极序列的多个第一路由线和分别连接到第二电极序列的多个第二路由线。 多个第一连接图案形成在与要彼此分离的第一和第二布线的同一层上。

公开(公告)号：US20110086450A1

公开(公告)日：2011-04-14

申请号：US12878737

申请日：2010-09-09

申请人： Seunghee NAM ,  Taehyoung Moon

发明人： Seunghee NAM ,  Taehyoung Moon

IPC分类号： H01L33/60

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1255

摘要： Disclosed is a method of manufacturing a TFT array substrate having a reduced number of mask processes. The method includes sequentially depositing a first conductive material, a gate insulating layer, a semiconductor layer, and a second conductive material on a substrate, and forming a first resist pattern having three height levels on the second conductive material. The method further includes forming a gate line, a data line that crosses the gate line and has first and second slit units, a source electrode connected to the data line and having a third slit unit, and a drain electrode positioned opposite the source electrode with a channel interposed between the source electrode and the drain electrode and having a fourth slit unit, through a plurality of etching processes using the first resist pattern.

摘要翻译： 公开了一种具有减少数量的掩模工艺的TFT阵列基板的制造方法。 该方法包括在衬底上依次沉积第一导电材料，栅极绝缘层，半导体层和第二导电材料，以及在第二导电材料上形成具有三个高度水平的第一抗蚀剂图案。 该方法还包括形成栅极线，跨越栅极线并具有第一和第二狭缝单元的数据线，连接到数据线并具有第三狭缝单元的源电极和与源电极相对定位的漏电极， 通过使用第一抗蚀剂图案的多个蚀刻工艺插入在源电极和漏电极之间并具有第四狭缝单元的通道。