公开(公告)号：US09337017B2

公开(公告)日：2016-05-10

申请号：US14758307

申请日：2014-08-11

申请人： Shaohai Zeng ,  Qingyun Zuo ,  Ming Li

发明人： Shaohai Zeng ,  Qingyun Zuo ,  Ming Li

IPC分类号： H01L21/02 ,  H01L21/302 ,  H01L21/768 ,  H01L21/3105

CPC分类号： H01L21/02274 ,  H01L21/02063 ,  H01L21/02101 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/0231 ,  H01L21/02348 ,  H01L21/302 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826

摘要： A method for repairing damages to sidewalls of an ultra-low dielectric constant film is disclosed by the present invention comprises the following steps: depositing an ultra-low dielectric constant film on an semiconductor substrate; dry-etching the ultra-low dielectric constant film to form a sidewall structure thereof; performing wet cleaning by using a chemical agent containing an unsaturated hydrocarbon having —O—C(Re)x; and performing ultraviolet curing. The present invention can restore pores size and porosity of the ultra-low dielectric constant film, and to keep effective dielectric constant to a minimum.

摘要翻译： 本发明公开了一种修复超低介电常数膜侧壁损伤的方法，包括以下步骤：在半导体衬底上沉积超低介电常数膜; 干蚀刻超低介电常数膜以形成其侧壁结构; 通过使用含有具有-O-C（Re）x的不饱和烃的化学试剂进行湿法清洗; 并进行紫外线固化。 本发明可以恢复超低介电常数膜的孔径和孔隙率，并将有效介电常数保持在最小值。

公开(公告)号：US20140217550A1

公开(公告)日：2014-08-07

申请号：US13884970

申请日：2012-02-07

申请人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

发明人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

IPC分类号： H01L49/02

CPC分类号： H01L28/20 ,  H01L23/5228 ,  H01L23/53238 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for manufacturing a semiconductor device with a metal film resistor structure. The method includes providing an insulation layer on the semiconductor device. A lower copper interconnect is formed in the insulation layer. The method also includes forming a cap layer on the insulation layer and the lower copper interconnect and etching the cap layer based on a single photolithography mask to form a window exposing portion of the lower copper interconnect and portion of the insulation layer. Further, the method includes forming a metal film layer on the cap layer and inside the window such that exposed portion of the lower copper interconnect is connected with part of the metal film layer within the window. The method also includes performing a chemical mechanical polishing (CMP) process to form a metal film resistor based on the metal film layer. The metal film resistor is connected with the portion of the lower copper interconnect.

摘要翻译： 提供一种用于制造具有金属膜电阻器结构的半导体器件的方法。 该方法包括在半导体器件上提供绝缘层。 在绝缘层中形成较低的铜互连。 该方法还包括在绝缘层和下铜互连上形成覆盖层，并且基于单个光刻掩模蚀刻覆盖层以形成下铜互连和绝缘层的一部分的窗口暴露部分。 此外，该方法包括在盖层和窗内部形成金属膜层，使得下铜互连的暴露部分与窗内的金属膜层的一部分连接。 该方法还包括进行化学机械抛光（CMP）工艺以形成基于金属膜层的金属膜电阻器。 金属膜电阻器与下部铜互连部分连接。

公开(公告)号：US09368565B2

公开(公告)日：2016-06-14

申请号：US13884970

申请日：2012-02-07

申请人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

发明人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

IPC分类号： H01L21/33 ,  H01L21/00 ,  H01L49/02 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L28/20 ,  H01L23/5228 ,  H01L23/53238 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for manufacturing a semiconductor device with a metal film resistor structure. The method includes providing an insulation layer on the semiconductor device. A lower copper interconnect is formed in the insulation layer. The method also includes forming a cap layer on the insulation layer and the lower copper interconnect and etching the cap layer based on a single photolithography mask to form a window exposing portion of the lower copper interconnect and portion of the insulation layer. Further, the method includes forming a metal film layer on the cap layer and inside the window such that exposed portion of the lower copper interconnect is connected with part of the metal film layer within the window. The method also includes performing a chemical mechanical polishing (CMP) process to form a metal film resistor based on the metal film layer. The metal film resistor is connected with the portion of the lower copper interconnect.

摘要翻译： 提供一种用于制造具有金属膜电阻器结构的半导体器件的方法。 该方法包括在半导体器件上提供绝缘层。 在绝缘层中形成较低的铜互连。 该方法还包括在绝缘层和下铜互连上形成覆盖层，并且基于单个光刻掩模蚀刻覆盖层以形成下铜互连和绝缘层的一部分的窗口暴露部分。 此外，该方法包括在盖层和窗内部形成金属膜层，使得下铜互连的暴露部分与窗内的金属膜层的一部分连接。 该方法还包括进行化学机械抛光（CMP）工艺以形成基于金属膜层的金属膜电阻器。 金属膜电阻器与下部铜互连部分连接。