公开(公告)号：US09337017B2

公开(公告)日：2016-05-10

申请号：US14758307

申请日：2014-08-11

申请人： Shaohai Zeng ,  Qingyun Zuo ,  Ming Li

发明人： Shaohai Zeng ,  Qingyun Zuo ,  Ming Li

IPC分类号： H01L21/02 ,  H01L21/302 ,  H01L21/768 ,  H01L21/3105

CPC分类号： H01L21/02274 ,  H01L21/02063 ,  H01L21/02101 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/0231 ,  H01L21/02348 ,  H01L21/302 ,  H01L21/3105 ,  H01L21/76814 ,  H01L21/76826

摘要： A method for repairing damages to sidewalls of an ultra-low dielectric constant film is disclosed by the present invention comprises the following steps: depositing an ultra-low dielectric constant film on an semiconductor substrate; dry-etching the ultra-low dielectric constant film to form a sidewall structure thereof; performing wet cleaning by using a chemical agent containing an unsaturated hydrocarbon having —O—C(Re)x; and performing ultraviolet curing. The present invention can restore pores size and porosity of the ultra-low dielectric constant film, and to keep effective dielectric constant to a minimum.

摘要翻译： 本发明公开了一种修复超低介电常数膜侧壁损伤的方法，包括以下步骤：在半导体衬底上沉积超低介电常数膜; 干蚀刻超低介电常数膜以形成其侧壁结构; 通过使用含有具有-O-C（Re）x的不饱和烃的化学试剂进行湿法清洗; 并进行紫外线固化。 本发明可以恢复超低介电常数膜的孔径和孔隙率，并将有效介电常数保持在最小值。

公开(公告)号：US20140217550A1

公开(公告)日：2014-08-07

申请号：US13884970

申请日：2012-02-07

申请人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

发明人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

IPC分类号： H01L49/02

CPC分类号： H01L28/20 ,  H01L23/5228 ,  H01L23/53238 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for manufacturing a semiconductor device with a metal film resistor structure. The method includes providing an insulation layer on the semiconductor device. A lower copper interconnect is formed in the insulation layer. The method also includes forming a cap layer on the insulation layer and the lower copper interconnect and etching the cap layer based on a single photolithography mask to form a window exposing portion of the lower copper interconnect and portion of the insulation layer. Further, the method includes forming a metal film layer on the cap layer and inside the window such that exposed portion of the lower copper interconnect is connected with part of the metal film layer within the window. The method also includes performing a chemical mechanical polishing (CMP) process to form a metal film resistor based on the metal film layer. The metal film resistor is connected with the portion of the lower copper interconnect.

摘要翻译： 提供一种用于制造具有金属膜电阻器结构的半导体器件的方法。 该方法包括在半导体器件上提供绝缘层。 在绝缘层中形成较低的铜互连。 该方法还包括在绝缘层和下铜互连上形成覆盖层，并且基于单个光刻掩模蚀刻覆盖层以形成下铜互连和绝缘层的一部分的窗口暴露部分。 此外，该方法包括在盖层和窗内部形成金属膜层，使得下铜互连的暴露部分与窗内的金属膜层的一部分连接。 该方法还包括进行化学机械抛光（CMP）工艺以形成基于金属膜层的金属膜电阻器。 金属膜电阻器与下部铜互连部分连接。

公开(公告)号：US09368565B2

公开(公告)日：2016-06-14

申请号：US13884970

申请日：2012-02-07

申请人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

发明人： Qingyun Zuo ,  Xiaoxu Kang ,  Shaohai Zeng

IPC分类号： H01L21/33 ,  H01L21/00 ,  H01L49/02 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L28/20 ,  H01L23/5228 ,  H01L23/53238 ,  H01L28/24 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for manufacturing a semiconductor device with a metal film resistor structure. The method includes providing an insulation layer on the semiconductor device. A lower copper interconnect is formed in the insulation layer. The method also includes forming a cap layer on the insulation layer and the lower copper interconnect and etching the cap layer based on a single photolithography mask to form a window exposing portion of the lower copper interconnect and portion of the insulation layer. Further, the method includes forming a metal film layer on the cap layer and inside the window such that exposed portion of the lower copper interconnect is connected with part of the metal film layer within the window. The method also includes performing a chemical mechanical polishing (CMP) process to form a metal film resistor based on the metal film layer. The metal film resistor is connected with the portion of the lower copper interconnect.

摘要翻译： 提供一种用于制造具有金属膜电阻器结构的半导体器件的方法。 该方法包括在半导体器件上提供绝缘层。 在绝缘层中形成较低的铜互连。 该方法还包括在绝缘层和下铜互连上形成覆盖层，并且基于单个光刻掩模蚀刻覆盖层以形成下铜互连和绝缘层的一部分的窗口暴露部分。 此外，该方法包括在盖层和窗内部形成金属膜层，使得下铜互连的暴露部分与窗内的金属膜层的一部分连接。 该方法还包括进行化学机械抛光（CMP）工艺以形成基于金属膜层的金属膜电阻器。 金属膜电阻器与下部铜互连部分连接。

公开(公告)号：US20120140543A1

公开(公告)日：2012-06-07

申请号：US13223165

申请日：2011-08-31

申请人： Ming Liu ,  Qingyun Zuo ,  Shibing Long ,  Changqing Xie ,  Zongliang Huo

发明人： Ming Liu ,  Qingyun Zuo ,  Shibing Long ,  Changqing Xie ,  Zongliang Huo

IPC分类号： G11C17/06 ,  H01L21/8246

CPC分类号： H01L29/872 ,  G11C17/06 ,  H01L27/1021 ,  H01L29/861

摘要： The present invention relates to a one time programming memory and method of storage and manufacture of the same. It belongs to microelectronic memory technology and manufacture field. The one time programming memory comprises a diode (10) having a unidirectional conducting rectification characteristic and a variable-resistance memory (20) having a bipolar conversion characteristic. The diode (10) having the unidirectional conducting rectification characteristic and the variable-resistance memory (20) having the bipolar conversion characteristic are connected in series. The one time programming memory device of the present invention takes the bipolar variable-resistance memory (20) as a storage unit, programming the bipolar variable-resistance memory (20) into different resistance states so as to carry out multilevel storage, and takes the unidirectional conducting rectification diode (10) as a gating unit. The rectification characteristic of unidirectional conducting rectification diode (10) can not only enable the bipolar variable-resistance storage (20) to be programmed only once but also inhibit crosstalk in a cross-array structure. The one time programming memory of the present invention is suitable to integration of the cross-array structure. It has the advantages like a simple structure, easy integration and high density. It can achieve multilevel storage and reduce the cost, which contribute to widely spreading and application of the present invention.

摘要翻译： 本发明涉及一次性编程存储器及其存储和制造方法。 属于微电子存储技术和制造领域。 一次性编程存储器包括具有单向导通整流特性的二极管（10）和具有双极转换特性的可变电阻存储器（20）。 具有单向导通整流特性的二极管（10）和具有双极转换特性的可变电阻存储器（20）串联连接。 本发明的一次性编程存储装置将双极可变电阻存储器（20）作为存储单元，将双极可变电阻存储器（20）编程成不同的电阻状态，以进行多级存储，并且 单向导通整流二极管（10）作为选通单元。 单向导通整流二极管（10）的整流特性不仅可以使双极可变电阻存储器（20）只编程一次，而且可以抑制交叉阵列结构中的串扰。 本发明的一次性编程存储器适合于集成交叉阵列结构。 具有结构简单，易于集成，密度高等优点。 它可以实现多级存储并降低成本，这有助于本发明的广泛推广和应用。

公开(公告)号：US08531861B2

公开(公告)日：2013-09-10

申请号：US13223165

申请日：2011-08-31

申请人： Ming Liu ,  Qingyun Zuo ,  Shibing Long ,  Changqing Xie ,  Zongliang Huo

发明人： Ming Liu ,  Qingyun Zuo ,  Shibing Long ,  Changqing Xie ,  Zongliang Huo

IPC分类号： G11C17/00

CPC分类号： H01L29/872 ,  G11C17/06 ,  H01L27/1021 ,  H01L29/861

摘要： One time programming memory and methods of storage and manufacture of the same are provided. Examples relate to microelectronic memory technology and manufacture. The one time programming memory includes a diode (10) having a unidirectional conducting rectification characteristic and a variable-resistance memory (20) having a bipolar conversion characteristic. The diode (10) having the unidirectional conducting rectification characteristic and the variable-resistance memory (20) having the bipolar conversion characteristic are connected in series. The one time programming memory device of this example takes the bipolar variable-resistance memory (20) as a storage unit, programming the bipolar variable-resistance memory (20) into different resistance states so as to carry out multilevel storage, and takes the unidirectional conducting rectification diode (10) as a gating unit. The rectification characteristic of unidirectional conducting rectification diode (10) can not only enable the bipolar variable-resistance storage (20) to be programmed only once but also inhibit crosstalk in a cross-array structure.

摘要翻译： 提供了一次编程存储器及其存储和制造方法。 实例涉及微电子存储器技术和制造。 一次编程存储器包括具有单向导通整流特性的二极管（10）和具有双极转换特性的可变电阻存储器（20）。 具有单向导通整流特性的二极管（10）和具有双极转换特性的可变电阻存储器（20）串联连接。 该实施例的一次性编程存储器件将双极可变电阻存储器（20）作为存储单元，将双极可变电阻存储器（20）编程成不同的电阻状态，以执行多级存储，并且采用单向 导通整流二极管（10）作为选通单元。 单向导通整流二极管（10）的整流特性不仅可以使双极可变电阻存储器（20）只编程一次，而且可以抑制交叉阵列结构中的串扰。