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公开(公告)号:US12100358B2
公开(公告)日:2024-09-24
申请号:US18504299
申请日:2023-11-08
IPC分类号: G09G3/20 , G09G3/3266 , G11C19/28
CPC分类号: G09G3/3266 , G09G2300/0426 , G09G2310/0286 , G09G2310/08
摘要: A unit circuit constituting each of stages of a shift register is provided with a thin film transistor, the thin film transistor including a control terminal applied with one of a plurality of gate clock signals, a first conduction terminal connected to a third node, and a second conduction terminal applied with a direct current power supply voltage of a low level. The third node is connected to a control terminal of a thin film transistor configured to change a potential of a second node toward a high level. When a gate clock signal applied to a control terminal of a thin film transistor configured to change a potential of the third node toward the high level changes from the high level to the low level, the gate clock signal applied to the control terminal of the thin film transistor changes from the low level to the high level.
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公开(公告)号:US11715437B2
公开(公告)日:2023-08-01
申请号:US17750449
申请日:2022-05-23
发明人: Yohei Takeuchi , Akira Tagawa , Yasuaki Iwase , Jun Nishimura
CPC分类号: G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0469 , G09G2310/0286 , G09G2310/0297 , G09G2320/045 , G11C19/28
摘要: A light control panel including an image display region including a region corresponding to an image display region in a display panel and a region corresponding to a peripheral circuit region in the display panel is provided between the display panel and a backlight. A pattern image for controlling radiation of light emitted from the backlight to the display panel is displayed in the image display region in the light control panel according to an action state of the peripheral circuit in the display panel.
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公开(公告)号:US11644729B2
公开(公告)日:2023-05-09
申请号:US17743517
申请日:2022-05-13
发明人: Jun Nishimura , Akira Tagawa , Yasuaki Iwase , Yohei Takeuchi
IPC分类号: G02F1/1368 , G02F1/1362 , G02F1/1343
CPC分类号: G02F1/1368 , G02F1/134336 , G02F1/136227 , G02F1/136286 , G02F2202/10
摘要: An active matrix substrate includes a first pixel region defined by first and second source bus lines adjacent to each other and first and second gate bus lines adjacent to each other and further includes a first pixel electrode and a first oxide semiconductor TFT that are associated with the first pixel region. The first oxide semiconductor TFT includes an oxide semiconductor layer and a gate electrode electrically connected to the first gate bus line. The oxide semiconductor layer includes a channel region and a low-resistance region including first and second regions located on opposite sides of the channel region. When viewed in a direction normal to the substrate, the low-resistance region extends across the first source bus line to another pixel region and partially overlaps a pixel electrode disposed in the other pixel region with an insulating layer interposed therebetween.
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