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    Active matrix substrate and liquid crystal display device
    1.
    发明授权
    Active matrix substrate and liquid crystal display device 有权

    公开(公告)号：US12117706B2

    公开(公告)日：2024-10-15

    申请号：US18407420

    申请日：2024-01-08

    申请人： Sharp Display Technology Corporation

    发明人： Kengo Hara ,  Tohru Daitoh ,  Yoshihito Hara ,  Jun Nishimura ,  Yohei Takeuchi

    IPC分类号： G02F1/1362 ,  G02F1/1368 ,  H01L27/12

    CPC分类号： G02F1/13629 ,  G02F1/1368 ,  H01L27/124

    摘要： An active matrix substrate includes a pixel TFT provided corresponding to each pixel region, a pixel electrode electrically connected to the pixel TFT, a plurality of gate wirings extending in a row direction, and a plurality of source wirings extending in a column direction. Each gate wiring has a multilayer structure including a lower gate wiring electrically connected to a lower gate electrode included in the pixel TFT and an upper gate wiring electrically connected to an upper gate electrode included in the pixel TFT. In a case where the number of the gate wirings is defined as m and the number of the source wirings is defined as n, each gate wiring has 3 or more and less than n contact portions, each contact portion is positioned in any of n intersection regions, and the number of the contact portions overlapping each source wiring is less than m.

    Active matrix substrate and display device
    2.
    发明授权
    Active matrix substrate and display device 有权

    公开(公告)号：US11830454B2

    公开(公告)日：2023-11-28

    申请号：US18101270

    申请日：2023-01-25

    申请人： Sharp Display Technology Corporation

    发明人： Kengo Hara ,  Tohru Daitoh ,  Yoshihito Hara ,  Jun Nishimura ,  Yohei Takeuchi

    IPC分类号： G09G3/36 ,  H01L27/12

    CPC分类号： G09G3/3677 ,  H01L27/124 ,  H01L27/1225 ,  G09G2310/0286 ,  G09G2330/021

    摘要： An active matrix substrate includes a gate driver including a shift register including a plurality of unit circuits connected in multiple stages. Each of the plurality of unit circuits includes an output node, a first node, a first TFT including a first gate terminal supplied with the set signal, a first source terminal connected to the first node, and a first drain terminal supplied with a first power supply potential higher than a low-level potential of the set signal, and a second TFT including a second gate terminal connected to the first node, a second source terminal connected to the output node, and a second drain terminal supplied with the clock signal. The first TFT includes a semiconductor layer, and a first and a second gate electrodes disposed on a side of the semiconductor layer opposite to the substrate and connected to the first gate terminal. The semiconductor layer includes a source contact region electrically connected to the first source terminal, a drain contact region electrically connected to the first drain terminal, and a first and a second channel regions separated from each other in a channel length direction between the contact regions when viewed from a normal direction of the substrate. The first gate electrode overlaps the first channel region via an upper gate insulating layer, and the second gate electrode overlaps the second channel region via the upper gate insulating layer.

    Active matrix substrate and liquid crystal display device
    5.
    发明授权
    Active matrix substrate and liquid crystal display device 有权

    公开(公告)号：US11644729B2

    公开(公告)日：2023-05-09

    申请号：US17743517

    申请日：2022-05-13

    申请人： Sharp Display Technology Corporation

    发明人： Jun Nishimura ,  Akira Tagawa ,  Yasuaki Iwase ,  Yohei Takeuchi

    IPC分类号： G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

    CPC分类号： G02F1/1368 ,  G02F1/134336 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2202/10

    摘要： An active matrix substrate includes a first pixel region defined by first and second source bus lines adjacent to each other and first and second gate bus lines adjacent to each other and further includes a first pixel electrode and a first oxide semiconductor TFT that are associated with the first pixel region. The first oxide semiconductor TFT includes an oxide semiconductor layer and a gate electrode electrically connected to the first gate bus line. The oxide semiconductor layer includes a channel region and a low-resistance region including first and second regions located on opposite sides of the channel region. When viewed in a direction normal to the substrate, the low-resistance region extends across the first source bus line to another pixel region and partially overlaps a pixel electrode disposed in the other pixel region with an insulating layer interposed therebetween.