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    HOT CARRIER PROGRAMMING OF NAND FLASH MEMORY
    3.
    发明申请
    HOT CARRIER PROGRAMMING OF NAND FLASH MEMORY 审中-公开
    NAND FLASH存储器的热载波编程

    公开(公告)号：US20120236649A1

    公开(公告)日：2012-09-20

    申请号：US13050658

    申请日：2011-03-17

    申请人： Shaw-Hung Ku ,  I-Chen Yang

    发明人： Shaw-Hung Ku ,  I-Chen Yang

    IPC分类号： G11C16/10

    CPC分类号： G11C16/0483 ,  G11C16/10 ,  G11C16/3418

    摘要： A NAND memory device includes strings of NAND memory cells, where each memory cell includes a charge trapping structure formed over a lightly-doped substrate region. A selected one of the NAND memory cells can be programmed by application of a relatively low program voltage in combination with a previously-applied set-up voltage, which is applied to the substrate for initiating inversion. The inversion in the substrate causes electrons to become hot in the channel regions, including the channel of the selected memory cell. As a result, the relatively lower program voltage can be used at the control gate of the selected memory cell for sufficiently energizing hot electrons to tunnel into the charge trapping structure of the selected memory cell.

    摘要翻译： NAND存储器件包括NAND存储器单元串，其中每个存储器单元包括在轻掺杂衬底区域上形成的电荷俘获结构。 可以通过将相对较低的编程电压与预先施加的建立电压结合使用来编程所选择的一个NAND存储器单元，该电压施加到用于启动反转的衬底。 衬底中的反转导致电子在包括所选择的存储单元的通道的通道区域中变热。 结果，可以在所选择的存储单元的控制栅极处使用相对较低的编程电压，以充分激励热电子以隧道进入所选存储单元的电荷捕获结构。

    Non-volatile memory and manufacturing method thereof
    4.
    发明授权
    Non-volatile memory and manufacturing method thereof 有权
    非易失性存储器及其制造方法

    公开(公告)号：US08664710B2

    公开(公告)日：2014-03-04

    申请号：US13494720

    申请日：2012-06-12

    申请人： Shaw-Hung Ku ,  Chi-Pei Lu ,  Chun-Lien Su

    发明人： Shaw-Hung Ku ,  Chi-Pei Lu ,  Chun-Lien Su

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28273 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory and a manufacturing method thereof are provided. The non-volatile memory includes a gate dielectric layer, a floating gate, a control gate, an inter-gate dielectric structure and two doped regions. The gate dielectric layer is disposed on a substrate. The floating gate is disposed on the gate dielectric layer. The control gate is disposed on the floating gate. The inter-gate dielectric structure is disposed between the control gate and the floating gate. The inter-gate dielectric structure includes a first oxide layer, a second oxide layer and a charged nitride layer. The first oxide layer is disposed on the floating gate. The second oxide layer is disposed on the first oxide layer. The charged nitride layer is disposed between the first oxide layer and the second oxide layer. The doped regions are disposed in the substrate at two sides of the floating gate, respectively.

    摘要翻译： 提供了一种非易失性存储器及其制造方法。 非易失性存储器包括栅极电介质层，浮动栅极，控制栅极，栅极间电介质结构和两个掺杂区域。 栅介质层设置在基板上。 浮栅设置在栅介质层上。 控制栅极设置在浮动栅极上。 栅极间电介质结构设置在控制栅极和浮置栅极之间。 栅极间电介质结构包括第一氧化物层，第二氧化物层和带电氮化物层。 第一氧化物层设置在浮动栅上。 第二氧化物层设置在第一氧化物层上。 带电的氮化物层设置在第一氧化物层和第二氧化物层之间。 掺杂区域分别在浮动栅极的两侧设置在基板中。

    NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF 有权
    非易失性存储器及其制造方法

    公开(公告)号：US20130328119A1

    公开(公告)日：2013-12-12

    申请号：US13494720

    申请日：2012-06-12

    申请人： Shaw-Hung Ku ,  Chi-Pei Lu ,  Chun-Lien Su

    发明人： Shaw-Hung Ku ,  Chi-Pei Lu ,  Chun-Lien Su

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L21/28273 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory and a manufacturing method thereof are provided. The non-volatile memory includes a gate dielectric layer, a floating gate, a control gate, an inter-gate dielectric structure and two doped regions. The gate dielectric layer is disposed on a substrate. The floating gate is disposed on the gate dielectric layer. The control gate is disposed on the floating gate. The inter-gate dielectric structure is disposed between the control gate and the floating gate. The inter-gate dielectric structure includes a first oxide layer, a second oxide layer and a charged nitride layer. The first oxide layer is disposed on the floating gate. The second oxide layer is disposed on the first oxide layer. The charged nitride layer is disposed between the first oxide layer and the second oxide layer. The doped regions are disposed in the substrate at two sides of the floating gate, respectively.

    摘要翻译： 提供了一种非易失性存储器及其制造方法。 非易失性存储器包括栅极电介质层，浮动栅极，控制栅极，栅极间电介质结构和两个掺杂区域。 栅介质层设置在基板上。 浮栅设置在栅介质层上。 控制栅极设置在浮动栅极上。 栅极间电介质结构设置在控制栅极和浮置栅极之间。 栅极间电介质结构包括第一氧化物层，第二氧化物层和带电氮化物层。 第一氧化物层设置在浮动栅上。 第二氧化物层设置在第一氧化物层上。 带电的氮化物层设置在第一氧化物层和第二氧化物层之间。 掺杂区域分别在浮动栅极的两侧设置在基板中。