Diagnosis and Treatment of Siglec-6 Associated Diseases
    1.
    发明申请
    Diagnosis and Treatment of Siglec-6 Associated Diseases 审中-公开
    Siglec-6相关疾病的诊断与治疗

    公开(公告)号:US20080267973A1

    公开(公告)日:2008-10-30

    申请号:US11629047

    申请日:2005-06-09

    摘要: The present invention relates to agonists, antagonists, and other molecules that specifically bind SIGLEC-6 on mast cells, their use in the treatment of asthma and other SIGLEC-6 mediated diseases or disorders, methods of diagnosing such diseases or disorders, and methods of screening for candidate compounds capable of modulating SIGLEC-6 activity in mast cells. The present invention also relates to the diagnosis and treatment of B-cell related disorders using compounds that bind and/or modulate SIGLEC-6.

    摘要翻译: 本发明涉及在肥大细胞上特异性结合SIGLEC-6的激动剂,拮抗剂和其他分子,它们在治疗哮喘和其它SIGLEC-6介导的疾病或病症中的用途,诊断此类疾病或病症的方法,以及 筛选能够调节肥大细胞中SIGLEC-6活性的候选化合物。 本发明还涉及使用结合和/或调节SIGLEC-6的化合物诊断和治疗B细胞相关疾病。

    Human mast cell-expressed membrane protein (gpcr)
    3.
    发明申请
    Human mast cell-expressed membrane protein (gpcr) 审中-公开
    人肥大细胞表达膜蛋白(gpcr)

    公开(公告)号:US20070260042A1

    公开(公告)日:2007-11-08

    申请号:US10562233

    申请日:2004-01-26

    IPC分类号: C07K14/00

    CPC分类号: B41J3/4078

    摘要: Motifs and patterns are generated by computer and printed on fabric, paper or plastic materials in continuous non-repeating patterns. The data is produced automatically by a random math algorithm, so that each of the printed patterns is similar, but not identical. The layout is arranged in a random manner, so that every part of the print is unique and exclusive. The size, color, motifs as well as the level of similarity or variety of the motifs and any other parameter essential to the design are all managed by the software.

    摘要翻译: 主题和图案由计算机生成,并以连续的非重复图案印在织物,纸张或塑料材料上。 数据通过随机数学算法自动产生,使得每个打印图案相似但不相同。 布局以随机的方式布置,使得打印的每个部分都是独一无二的。 尺寸,颜色,图案以及图案的相似性或多样性水平以及设计所必需的任何其他参数均由软件管理。

    System Clock Generation Circuit
    4.
    发明申请
    System Clock Generation Circuit 审中-公开
    系统时钟发生电路

    公开(公告)号:US20080292629A1

    公开(公告)日:2008-11-27

    申请号:US11597769

    申请日:2005-05-26

    CPC分类号: C07K16/22 A61K2039/505

    摘要: A system clock signal generator circuit comprising a first PLL circuit that is frequency and phase locked to a wobble signal; a frequency and phase comparator for comprising a first output signal from the first PLL circuit with a system clock signal as frequency divided by M and for outputting a second output signal based on the differences in frequency and in phase; a PLL filter for providing a predetermined cutoff to the second output signal to output a third output signal; a pulse width modulating circuit for generating a pulse wave, the carrier frequency of which is a second reference clock signal, and for outputting a fourth output signal obtained by modulating the pulse width of the pulse wave by the third output signal; a low pass filter for smoothing the fourth output signal to output a fifth output signal; a VCO circuit the control voltage of which is the fifth output signal; a first frequency divider circuit for frequency dividing an output signal of the VCO circuit by N to output a system clock signal; and a second frequency divider circuit for frequency dividing, by M, and feeding the system clock signal back to the frequency and phase comparator.

    摘要翻译: 一种系统时钟信号发生器电路,包括频率和锁相到摆动信号的第一PLL电路; 频率和相位比较器,用于包括来自第一PLL电路的第一输出信号,其中系统时钟信号被频率除以M,并且用于基于频率和相位上的差异来输出第二输出信号; PLL滤波器,用于向第二输出信号提供预定的截止以输出第三输出信号; 用于产生其载波频率为第二参考时钟信号的脉波的脉宽调制电路,用于输出通过第三输出信号调制脉波的脉冲宽度获得的第四输出信号; 低通滤波器,用于平滑第四输出信号以输出第五输出信号; VCO电路,其控制电压为第五输出信号; 第一分频器电路,用于将VCO电路的输出信号分频为N以输出系统时钟信号; 和用于通过M分频并将系统时钟信号反馈给频率和相位比较器的第二分频器电路。