公开(公告)号：US08248353B2

公开(公告)日：2012-08-21

申请号：US11894752

申请日：2007-08-20

申请人： Sheng-Chao Liu ,  Chen-Ming Chen ,  Ming-Tien Lin

发明人： Sheng-Chao Liu ,  Chen-Ming Chen ,  Ming-Tien Lin

IPC分类号： G09G3/36

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/04

摘要： A discharging device is used to reduce the voltage level at a bootstrap point in an electronic circuit such as a shift register circuit. In such a circuit, a first transistor in a conducting state receives an input pulse and conveys it to the gate terminal of a second transistor, causing the second transistor to be in a conducting state. This gate terminal is known as a bootstrap point. After receiving the input pulse, an output pulse is produced at one drain/source terminal of the second transistor. During the time period of the output pulse, the first transistor is in a non-conducting state and the voltage level at the bootstrap point is high, imposing a stress upon the first transistor. A discharging circuit consisting of at least one transistor is coupled to the bootstrap point in order to reduce the voltage level at the output pulse period.

摘要翻译： 放电装置用于降低诸如移位寄存器电路的电子电路中的自举点处的电压电平。 在这种电路中，导通状态的第一晶体管接收输入脉冲并将其传送到第二晶体管的栅极端子，使第二晶体管处于导通状态。 该门终端被称为引导点。 在接收到输入脉冲之后，在第二晶体管的一个漏极/源极端产生输出脉冲。 在输出脉冲的时间周期期间，第一晶体管处于非导通状态，并且自举点处的电压电平高，对第一晶体管施加应力。 由至少一个晶体管组成的放电电路耦合到自举点，以便降低输出脉冲周期的电压电平。

公开(公告)号：US20090051639A1

公开(公告)日：2009-02-26

申请号：US11894752

申请日：2007-08-20

申请人： Sheng-Chao Liu ,  Chen-Ming Chen ,  Ming-Tien Lin

发明人： Sheng-Chao Liu ,  Chen-Ming Chen ,  Ming-Tien Lin

IPC分类号： G09G3/36 ,  G11C19/00

CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2330/04

摘要： A discharging device is used to reduce the voltage level at a bootstrap point in an electronic circuit such as a shift register circuit. In such a circuit, a first transistor in a conducting state receives an input pulse and conveys it to the gate terminal of a second transistor, causing the second transistor to be in a conducting state. This gate terminal is known as a bootstrap point. After receiving the input pulse, an output pulse is produced at one drain/source terminal of the second transistor. During the time period of the output pulse, the first transistor is in a non-conducting state and the voltage level at the bootstrap point is high, imposing a stress upon the first transistor. A discharging circuit consisting of at least one transistor is coupled to the bootstrap point in order to reduce the voltage level at the output pulse period.

摘要翻译： 放电装置用于降低诸如移位寄存器电路的电子电路中的自举点处的电压电平。 在这种电路中，导通状态的第一晶体管接收输入脉冲并将其传送到第二晶体管的栅极端子，使第二晶体管处于导通状态。 该门终端被称为引导点。 在接收到输入脉冲之后，在第二晶体管的一个漏极/源极端产生输出脉冲。 在输出脉冲的时间周期期间，第一晶体管处于非导通状态，并且自举点处的电压电平高，对第一晶体管施加应力。 由至少一个晶体管组成的放电电路耦合到自举点，以便降低输出脉冲周期的电压电平。

公开(公告)号：US20100059758A1

公开(公告)日：2010-03-11

申请号：US12405247

申请日：2009-03-17

申请人： Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

发明人： Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

IPC分类号： H01L33/00 ,  H01L29/786

CPC分类号： H01L27/1255 ,  G02F1/136286 ,  H01L27/1214

摘要： A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.

摘要翻译： 三栅极像素结构包括三个子像素区域，三个栅极线，数据线，三个薄膜晶体管（TFT），三个像素电极和公共线。 栅极线沿着第一方向设置，并且数据线沿着第二方向设置。 TFT分别设置在子像素区域中，其中每个TFT具有电连接到相应的栅极线的栅电极，与数据线电连接的源电极和漏电极。 三个像素电极分别设置在三个子像素区域中，并且每个像素电极分别电连接到一个TFT的漏电极。 公共线与栅极线交叉并且部分地重叠三条栅极线，并且公共线和三个像素电极部分地重叠以分别形成三个存储电容器。

公开(公告)号：US08405787B2

公开(公告)日：2013-03-26

申请号：US12405247

申请日：2009-03-17

申请人： Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

发明人： Sheng-Chao Liu ,  Hsiang-Lin Lin ,  Kuang-Hsiang Liu ,  Ching-Huan Lin ,  Ming-Tien Lin

IPC分类号： G02F1/1343

CPC分类号： H01L27/1255 ,  G02F1/136286 ,  H01L27/1214

摘要： A tri-gate pixel structure includes three sub-pixel regions, three gate lines, a data line, three thin film transistors (TFTs), three pixel electrodes, and a common line. The gate lines are disposed along a first direction, and the data line is disposed along a second direction. The TFTs are disposed in the sub-pixel regions respectively, wherein each TFT has a gate electrode electrically connected to a corresponding gate line, a source electrode electrically connected to the data line, and a drain electrode. The three pixel electrodes are disposed in the three sub-pixel regions respectively, and each pixel electrode is electrically connected to the drain electrode of one TFT respectively. The common line crosses the gate lines and partially overlaps the three gate lines, and the common line and the three pixel electrodes are partially overlapped to respectively form three storage capacitors.

摘要翻译： 三栅极像素结构包括三个子像素区域，三个栅极线，数据线，三个薄膜晶体管（TFT），三个像素电极和公共线。 栅极线沿着第一方向设置，并且数据线沿着第二方向设置。 TFT分别设置在子像素区域中，其中每个TFT具有电连接到相应的栅极线的栅电极，与数据线电连接的源电极和漏电极。 三个像素电极分别设置在三个子像素区域中，并且每个像素电极分别电连接到一个TFT的漏电极。 公共线与栅极线交叉并且部分地重叠三条栅极线，并且公共线和三个像素电极部分地重叠以分别形成三个存储电容器。

公开(公告)号：US20050151899A1

公开(公告)日：2005-07-14

申请号：US10709431

申请日：2004-05-05

申请人： Yi-Lun Chou ,  Seok-Lyul Lee ,  Tean-Sen Jen ,  Ming-Tien Lin

发明人： Yi-Lun Chou ,  Seok-Lyul Lee ,  Tean-Sen Jen ,  Ming-Tien Lin

IPC分类号： G02F1/1333 ,  G02F1/1335

CPC分类号： G02F1/133512 ,  G02F1/1333 ,  G02F2001/13415

摘要： A liquid crystal display panel comprises a first substrate, a second substrate, a sealant, a liquid crystal layer, and a light-shielding layer, wherein the sealant is disposed between the first substrate and the second substrate; the liquid crystal layer is disposed among the first substrate, the second substrate and the sealant; and the light shielding layer is disposed on a surface of the first substrate but notin contact with the liquid crystal layer.

摘要翻译： 液晶显示面板包括第一基板，第二基板，密封剂，液晶层和遮光层，其中密封剂设置在第一基板和第二基板之间; 液晶层设置在第一基板，第二基板和密封剂之间; 并且所述遮光层设置在所述第一基板的表面上，但不与所述液晶层接触。

公开(公告)号：US20050041194A1

公开(公告)日：2005-02-24

申请号：US10883274

申请日：2004-07-01

申请人： Seok-Lyul Lee ,  Shao-Wu Hsu ,  Ming-Tien Lin

发明人： Seok-Lyul Lee ,  Shao-Wu Hsu ,  Ming-Tien Lin

IPC分类号： G02F1/1339 ,  G02F1/1341

CPC分类号： G02F1/13394 ,  G02F1/1341

摘要： A liquid crystal display (LCD) having a narrow cell gap is produced by a one-drop fill (ODF) process. Openings are formed in the protection layer on a thin film transistor (TFT) array substrate. These openings are located on the corresponding positions of photoresist spacers and a photoresist guard ring on a color filter substrate to receive the photoresist spacers and the photoresist guard ring and allow them to be in contact with the TFT array substrate. Therefore, the poor display quality problem caused by the photoresist spacers and the photoresist guard ring with uneven heights can be resolved.

摘要翻译： 通过一滴填充（ODF）处理产生具有窄单元间隙的液晶显示器（LCD）。 开口形成在薄膜晶体管（TFT）阵列基板上的保护层中。 这些开口位于滤色器基板上的光致抗蚀剂隔离物和光致抗蚀剂保护环的相应位置上，以接收光致抗蚀剂隔离物和光致抗蚀剂保护环，并允许它们与TFT阵列基板接触。 因此，可以解决由光致抗蚀剂间隔物和具有不均匀高度的光致抗蚀剂防护环引起的差的显示质量问题。

公开(公告)号：US20050018121A1

公开(公告)日：2005-01-27

申请号：US10848243

申请日：2004-05-17

申请人： Tean-Sen Jen ,  Peter Liao ,  Ming-Tien Lin

发明人： Tean-Sen Jen ,  Peter Liao ,  Ming-Tien Lin

IPC分类号： G02F1/1345

CPC分类号： G09G3/3611 ,  G02F1/1345 ,  G09G2300/0426 ,  G09G2320/0223

摘要： A liquid crystal display panel with reduced flicker comprises an active matrix substrate equipped with a plurality of thin film transistors. The active matrix substrate has an active area that is formed with a plurality of first signal lines and a plurality of second signal lines crossing each other. The active area includes a plurality of pixels arranged in a matrix. There are outer-lead bonding areas around the active area. There are a plurality of pad areas within the outer-lead bonding areas. A plurality of second wires arranged in a fan-out configuration extend from the pad areas and stretch toward the active area. The second wires are connected to their respective first signal lines by their serpentine or zigzag routes resulting in various wire lengths. A frame-like lead overlaps the second wires, and a capacitor exists between each of the second wires and the closed frame-like lead. The induced capacitor and the resistance of the corresponding second wire together result in a compensation effect so as to uniform the time constants of the plurality of first signal lines.

摘要翻译： 具有减少的闪烁的液晶显示面板包括配备有多个薄膜晶体管的有源矩阵基板。 有源矩阵基板具有形成有多个第一信号线和彼此交叉的多个第二信号线的有源区域。 有源区域包括以矩阵形式布置的多个像素。 有源区域周围有外引线接合区域。 在外引线接合区域内有多个焊盘区域。 以扇出配置布置的多个第二布线从焊盘区域延伸并朝向有效区域拉伸。 第二根线通过其蛇形或锯齿形路线连接到它们各自的第一信号线，导致各种线长度。 框架状引线与第二导线重叠，并且在每个第二导线和封闭的框架状引线之间存在电容器。 感应电容器和对应的第二导线的电阻在一起导致补偿效应，以使多个第一信号线的时间常数均匀。

公开(公告)号：US06589864B2

公开(公告)日：2003-07-08

申请号：US09803855

申请日：2001-03-12

申请人： Gow-Zin Yiu ,  Tean-Sen Jen ,  Shao-Wu Hsu ,  Ming-Tien Lin ,  Ching-Lin Fan

发明人： Gow-Zin Yiu ,  Tean-Sen Jen ,  Shao-Wu Hsu ,  Ming-Tien Lin ,  Ching-Lin Fan

IPC分类号： H01L214763

CPC分类号： H01L29/66742 ,  H01L29/42384

摘要： A method for defining plural windows with different etching depths simultaneously is disclosed. The method includes steps of (a) forming a photoresist on a substrate having a multiple film structure thereon, (b) exposing a first region of the photoresist to a first exposure dose and a second region of the photoresist to a second exposure dose, (c) obtaining different remaining thickenesses of the photoresist on the first region and the second region by a development, and (d) etching the first region and the second region of the photoresist for forming the plural windows with different etching depths of the multiple film structure.

摘要翻译： 公开了一种用于同时定义具有不同蚀刻深度的多个窗口的方法。 该方法包括以下步骤：（a）在其上具有多个膜结构的基底上形成光致抗蚀剂，（b）将光致抗蚀剂的第一区域暴露于第一曝光剂量和第二曝光剂量的第二区域（ c）通过显影在第一区域和第二区域上获得光致抗蚀剂的不同剩余厚度，以及（d）蚀刻光致抗蚀剂的第一区域和第二区域，以形成具有不同蚀刻深度的多个窗口的多个膜结构 。

公开(公告)号：US08742261B2

公开(公告)日：2014-06-03

申请号：US13340084

申请日：2011-12-29

申请人： Ming-Tien Lin ,  Po-Sheng Shih

发明人： Ming-Tien Lin ,  Po-Sheng Shih

IPC分类号： H05K1/09 ,  H05K1/11 ,  B82Y99/00

CPC分类号： H05K1/097 ,  B82Y30/00 ,  H05K1/0289 ,  H05K2201/0108

摘要： A transparent conductive film includes a number of first transparent conductive stripes extending along a first direction and a number of second transparent conductive stripes extending along a second direction and intersecting the number of first transparent conductive stripes. The first conductive stripes are spaced from each other and extend substantially along a first direction. The second transparent conductive stripes are spaced from each other and extend substantially along a second direction. The first transparent conductive stripes are electrically connected with the second transparent conductive stripes. The first transparent conductive stripes and the second conductive stripes are arranged in patterns such that the transparent conductive film has an anisotropic impedance. The first direction is a low impedance direction. A resistivity of the transparent conductive film in the low impedance direction is smaller than the resistivity of the transparent conductive film in the second direction and any other direction.

摘要翻译： 透明导电膜包括沿着第一方向延伸的多个第一透明导电条和沿着第二方向延伸并且与第一透明导电条的数量相交的多个第二透明导电条。 第一导电条彼此间隔开并且基本沿第一方向延伸。 第二透明导电条彼此间隔开并基本沿第二方向延伸。 第一透明导电条与第二透明导电条电连接。 第一透明导电条和第二导电条布置成图案，使得透明导电膜具有各向异性阻抗。 第一个方向是低阻抗方向。 透明导电膜在低阻抗方向的电阻率小于透明导电膜在第二方向和任何其它方向上的电阻率。

公开(公告)号：US20090284483A1

公开(公告)日：2009-11-19

申请号：US12255878

申请日：2008-10-22

申请人： Yu-Hsin Ting ,  Chee-Wai Lau ,  Ming-Tien Lin ,  Chung-Lung Li ,  Heng-Sheng Chou

发明人： Yu-Hsin Ting ,  Chee-Wai Lau ,  Ming-Tien Lin ,  Chung-Lung Li ,  Heng-Sheng Chou

IPC分类号： G06F3/041

CPC分类号： G06F3/044 ,  G06F3/0412

摘要： A display device and method having a sensing function is described. The device includes a liquid crystal display (LCD) panel and plural sense lines. The LCD panel includes a plurality of data lines and a plurality of gate lines. Each of the data lines is connected electrically to a plurality of left pixels and a plurality of right pixels. The sense line is disposed between each two adjacent data lines, and each of the sense lines is configured to be parallel to the data lines and perpendicular to the gate lines. The sense lines are used to transmit touch signals.

摘要翻译： 描述具有感测功能的显示装置和方法。 该装置包括液晶显示器（LCD）面板和多条感测线。 LCD面板包括多条数据线和多条栅极线。 每条数据线与多个左像素和多个右像素电连接。 感测线设置在每个两个相邻数据线之间，并且每个感测线被配置为平行于数据线并垂直于栅极线。 感测线用于传输触摸信号。