Process for fabricating tantalum nitride diffusion barrier for copper
matallization
    1.
    发明授权
    Process for fabricating tantalum nitride diffusion barrier for copper matallization 失效
    用于制造铜金属化的氮化钽扩散阻挡层的工艺

    公开(公告)号:US5668054A

    公开(公告)日:1997-09-16

    申请号:US584749

    申请日:1996-01-11

    摘要: A process for fabricating a tantalum nitride diffusion barrier for the advanced copper metallization of semiconductor devices is disclosed. The process comprises the steps of first preparing a semiconductor device fabricated over the surface of a silicon substrate having a component with a fabricated contact opening. Before the formation of the copper contact by deposition, the process performs a tantalum nitride low-pressure chemical-vapor-deposition procedure that deposits a layer of tantalum nitride thin film over the surface of the device substrate. After the copper deposition, a photoresist layer is subsequently fabricated for patterning the deposited copper contact and tantalum nitride layers, whereby the deposited thin film of tantalum nitride is patterned to form the thin film as the metallization diffusion barrier for the semiconductor device. The tantalum nitride low-pressure chemical-vapor-deposition procedure includes depositing a layer of tantalum nitride utilizing a metal-organic precursor terbutylimido-tris-diethylamido tantalum (TBTDET) in a cold-wall low pressure reactor with a base pressure of about 10.sup.-5 torr. The source of the metal-organic precursor is vaporized at a temperature of about 40.degree. to 50.degree. C. The typical deposition pressure is about 20 mtorr. Tantalum nitride layer of low carbon content and low resistivity may thus be formed in the disclosed chemical-vapor-deposition procedure having effective capability against copper diffusion.

    摘要翻译: 公开了一种用于制造用于半导体器件的先进铜金属化的氮化钽扩散阻挡层的工艺。 该方法包括以下步骤:首先制备在具有制造的接触开口的部件的硅衬底的表面上制造的半导体器件。 在通过沉积形成铜接触之前,该工艺执行在器件衬底的表面上沉积氮化钽薄层的氮化钽低压化学气相沉积工艺。 在铜沉积之后,随后制造光致抗蚀剂层以图案化沉积的铜接触和氮化钽层,由此沉积的氮化钽薄膜被图案化以形成作为半导体器件的金属化扩散阻挡层的薄膜。 氮化钽低压化学气相沉积方法包括使用金属有机前体叔丁基亚氨基 - 三 - 二乙基氨基钽(TBTDET)在基本压力为约10 -6的冷壁低压反应器中沉积氮化钽层, 5托 金属有机前体的来源在约40℃至50℃的温度下蒸发。典型的沉积压力为约20毫托。 因此,可以在具有对铜扩散的有效能力的公开的化学气相沉积方法中形成低碳含量和低电阻率的氮化钽层。

    MOCVD molybdenum nitride diffusion barrier for CU metallization
    2.
    发明授权
    MOCVD molybdenum nitride diffusion barrier for CU metallization 有权
    用于CU金属化的MOCVD钼氮化物扩散阻挡层

    公开(公告)号:US06359160B1

    公开(公告)日:2002-03-19

    申请号:US09590123

    申请日:2000-06-09

    IPC分类号: C07F1100

    摘要: A new method of forming a molybdenum nitride barrier layer by chemical vapor deposition from the precursor bisdiethylamido-bistertbutylimido-molybdenum (BDBTM) as a diffusion barrier for copper metallization is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer is deposited overlying the sermiconductor device structures. A via opening is etched through the insulating layer to contact one of the semiconductor device structures. A barrier layer of molybdenum nitride is conformally deposited by chemical vapor deposition within the via. A layer of copper is deposited overlying the molybdenum nitride barrier layer wherein the molybdenum nitride barrier layer prevents copper diffusion to complete the copper metallization in the fabrication of an integrated circuit device.

    摘要翻译: 描述了通过化学气相沉积从作为铜金属化的扩散阻挡层的前体双二乙基氨基 - 二乙基亚胺基 - 钼(BDBTM)形成氮化钼阻挡层的新方法。 半导体器件结构设置在半导体衬底中和半导体衬底上。 绝缘层沉积在半导体器件结构上。 通孔绝缘层被蚀刻以接触半导体器件结构之一。 通过化学气相沉积在通孔内共形沉积氮化钼的阻挡层。 覆盖氮化钼阻挡层上的一层铜沉积,其中氮化钼阻挡层在制造集成电路器件时防止铜扩散完成铜金属化。

    MOCVD molybdenum nitride diffusion barrier for Cu metallization
    3.
    发明授权
    MOCVD molybdenum nitride diffusion barrier for Cu metallization 失效
    用于Cu金属化的MOCVD钼氮化物扩散阻挡层

    公开(公告)号:US6114242A

    公开(公告)日:2000-09-05

    申请号:US985404

    申请日:1997-12-05

    摘要: A new method of forming a molybdenum nitride barrier layer by chemical vapor deposition from the precursor bisdiethylamido-bistertbutylimido-molybdenum (BDBTM) as a diffusion barrier for copper metallization is described. Semiconductor device structures are provided in and on a semiconductor substrate. An insulating layer is deposited overlying the semiconductor devise structures. A via opening is etched through the insulating layer to contact one of the semiconductor device structures. A barrier layer of molybdenum nitride is conformally deposited by chemical vapor deposition within the via. A layer of copper is deposited overlying the molybdenum nitride barrier layer wherein the molybdenum nitride barrier layer prevents copper diffusion to complete the copper metallization in the fabrication of an integrated circuit device.

    摘要翻译: 描述了通过化学气相沉积从作为铜金属化的扩散阻挡层的前体双二乙基氨基 - 二乙基亚胺基 - 钼(BDBTM)形成氮化钼阻挡层的新方法。 半导体器件结构设置在半导体衬底中和半导体衬底上。 绝缘层沉积在半导体器件结构上。 通孔绝缘层被蚀刻以接触半导体器件结构之一。 通过化学气相沉积在通孔内共形沉积氮化钼的阻挡层。 覆盖氮化钼阻挡层上的一层铜沉积,其中氮化钼阻挡层在制造集成电路器件时防止铜扩散完成铜金属化。