公开(公告)号：US4996572A

公开(公告)日：1991-02-26

申请号：US449333

申请日：1989-12-11

申请人： Shinichi Tanaka ,  Masayuki Hori ,  Noriyoshi Tozawa

发明人： Shinichi Tanaka ,  Masayuki Hori ,  Noriyoshi Tozawa

IPC分类号： H01L21/8247 ,  H01L21/8246 ,  H01L27/112 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L29/7885 ,  H01L29/7881

摘要： A semiconductor memory device containing a number of memory cells each having a floating gate, an erase gate, and a control gate. In a data erasure mode, electrons are discharged from the floating gate into the erase gate electrode. An insulating film interlaid between the erase gate and the control gate has a three-layered structure consisting of a silicon oxide film, a silicon nitride film, and a silicon oxide film.

公开(公告)号：US5252846A

公开(公告)日：1993-10-12

申请号：US908871

申请日：1992-07-07

申请人： Shinichi Tanaka ,  Masayuki Hori ,  Kazunori Kanebako ,  Noriyoshi Tozawa

发明人： Shinichi Tanaka ,  Masayuki Hori ,  Kazunori Kanebako ,  Noriyoshi Tozawa

IPC分类号： H01L29/788 ,  H01L29/792

CPC分类号： H01L29/7885

摘要： A semiconductor memory device containing a number of memory cells each having a floating gate, an erase gate, and a control gate. In a data erasure mode, electrons are discharged from the floating gate into the erase gate. In the semiconductor memory device, an impurity concentration in at least a region of the floating gate overlapping with the erase gate is lower than that of the erase gate.

摘要翻译： 一种包含多个存储单元的半导体存储器件，每个存储单元均具有浮置栅极，擦除栅极和控制栅极。 在数据擦除模式中，电子从浮动栅极放电到擦除栅极。 在半导体存储器件中，与擦除栅极重叠的浮置栅极的至少一个区域中的杂质浓度低于擦除栅极的杂质浓度。

公开(公告)号：US5237206A

公开(公告)日：1993-08-17

申请号：US969525

申请日：1992-10-30

申请人： Masamitsu Yahata ,  Noriyoshi Tozawa ,  Toshiki Tsushima

发明人： Masamitsu Yahata ,  Noriyoshi Tozawa ,  Toshiki Tsushima

IPC分类号： H01L21/50 ,  H01L21/58 ,  H01L23/10 ,  H01L23/13

CPC分类号： H01L24/83 ,  H01L21/50 ,  H01L23/10 ,  H01L23/13 ,  H01L24/26 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/3511

摘要： A low-melting point glass sealed semiconductor device comprises a pair of ceramic substrates, each of which is shaped like an arch. The ceramic substrates are overlaid with each other, in such a manner as to define a space between them. Through this space, a gas generated from a thermosetting mounting agent used for adhesion is guided to the outside of the semiconductor device.

摘要翻译： 低熔点玻璃密封半导体器件包括一对陶瓷基板，每个陶瓷基板的形状都像拱形。 陶瓷基板彼此重叠，以便在它们之间限定空间。 通过该空间，由用于粘合的热固性安装剂产生的气体被引导到半导体器件的外部。