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公开(公告)号:US4994687A
公开(公告)日:1991-02-19
申请号:US277112
申请日:1988-11-29
申请人: Shinji Fujii , Ikuo Tsuchiya , Kazuhiko Kasai
发明人: Shinji Fujii , Ikuo Tsuchiya , Kazuhiko Kasai
CPC分类号: H03K3/033
摘要: A retriggerable multivibrator is disclosed which comprises a first delay circuit connected for delaying an input signal a predetermined time, a second delay circuit connected to receive an output of the first delay circuit and having a enable or disable function, a flip-flop circuit connected to be set or reset in accordance with an input signal and output signal from the second delay circuit, and a control circuit for detecting a subsequent input signal within a predetermined delay time to enable or disable the second delay circuit.
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公开(公告)号:US5146120A
公开(公告)日:1992-09-08
申请号:US735951
申请日:1991-07-25
申请人: Masahiro Kimura , Kenji Matsuo , Ikuo Tsuchiya , Masayo Fukuda
发明人: Masahiro Kimura , Kenji Matsuo , Ikuo Tsuchiya , Masayo Fukuda
IPC分类号: H01L29/73 , H01L21/331 , H01L21/82 , H01L21/8249 , H01L27/06 , H03K19/003
CPC分类号: H03K19/00353
摘要: A low-noise output buffer circuit of this invention comprises a P-channel MOSFET having a source connected to a power source potential, for outputting the power source potential according to a first input signal, an N-channel MOSFET having a source connected to a ground potential, for outputting the ground potential according to a second input signal, a bipolar transistor having a collector connected to the power source potential, an emitter connected to an output terminal and a base connected to the drain of the P-channel MOSFET, and a diode having a cathode connected to the drain of the N-channel MOSFET and an anode connected to the base of the NPN bipolar transistor.
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公开(公告)号:US4859970A
公开(公告)日:1989-08-22
申请号:US277108
申请日:1988-11-29
申请人: Kenji Matsuo , Ikuo Tsuchiya
发明人: Kenji Matsuo , Ikuo Tsuchiya
CPC分类号: H03L7/081 , H03L7/0891
摘要: A voltage controlled oscillator comprises a phase locked loop section and a voltage controlled oscillator section. The phase locked loop section is coupled with an input signal at a reference frequency and a reference potential, and performs a signal feedback control so as to obtain a constant delay time of a first variable delay circuit contained in the phase locked loop section. The voltage controlled oscillator section controls a delay time of a second variable delay circuit in a ring oscillator by a control input voltage and an output voltage of a low-pass filter contained in the phase locked loop section, and produces a signal oscillating at a frequency as determined by the delay time. In the voltage controlled oscillator thus arranged, the output frequency is determined by controlling a delay time of the second variable delay circuit in the voltage controlled oscillator section. Since the delay time is accurately controlled by the phase locked loop section, the obtained output frequency is stable against the variance of the process parameters. Since the delay time is varied by the reference frequency of the input signal, the output frequency may be set at a desired frequency, and hence a frequency band of the oscillation frequencies may also be set appropriately.
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公开(公告)号:US07834193B2
公开(公告)日:2010-11-16
申请号:US11787312
申请日:2007-04-16
申请人: Toshiaki Yamaguchi , Ikuo Tsuchiya , Ken Kikuchi , Takashi Yanagi
发明人: Toshiaki Yamaguchi , Ikuo Tsuchiya , Ken Kikuchi , Takashi Yanagi
IPC分类号: C07D209/12 , C07D209/14
CPC分类号: C07D209/08
摘要: The present invention provides an industrial method production of silodosin, which is useful for a therapeutic agent for dysuria associated with benign prostatic hyperplasia. The production of silodosine is characterized by mixing 3-{7-cyano-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)-phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indol-1-yl}-propyl benzoate and oxalic acid to yield the oxalate, subsequently hydrolyzing the oxalate salt to yield 1-(3-hydroxypropyl)-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indole-7-carbonitrile and hydrolyzing the same, and manufacturing intermediates used therefore.
摘要翻译: 本发明提供了可用于与良性前列腺增生相关的排尿困难的治疗剂的西洛德辛的工业方法生产。 酪氨酸的产生的特征在于将3- {7-氰基-5 - [(2R)-2 - ({2- [2-(2,2,2-三氟乙氧基) - 苯氧基]乙基}氨基]丙基] 2,3-二氢-1H-吲哚-1-基} - 丙基苯甲酸酯和草酸,得到草酸盐,随后水解草酸盐,得到1-(3-羟基丙基)-5 - [(2R)-2-( {2- [2-(2,2,2-三氟乙氧基)苯氧基]乙基}氨基]丙基] -2,3-二氢-1H-吲哚-7-甲腈并水解,由此制造中间体。
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公开(公告)号:US20070197627A1
公开(公告)日:2007-08-23
申请号:US11787312
申请日:2007-04-16
申请人: Toshiaki Yamaguchi , Ikuo Tsuchiya , Ken Kikuchi , Takashi Yanagi
发明人: Toshiaki Yamaguchi , Ikuo Tsuchiya , Ken Kikuchi , Takashi Yanagi
IPC分类号: C07D209/14 , A61K31/405
CPC分类号: C07D209/08
摘要: The present invention provides an industrial method production of silodosin, which is useful for a therapeutic agent for dysuria associated with benign prostatic hyperplasia. The production of silodosine is characterized by mixing 3-{7-cyano-5-[(2R)-2-({(2-[2-(2,2,2-trifluoroethoxy)-phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indol-1-yl}-propyl benzoate and oxalic acid to yield the oxalate, subsequently hydrolyzing the oxalate salt to yield 1-(3-hydroxypropyl)-5-[(2R)-2-({2-[2-(2,2,2-trifluoroethoxy)phenoxy]ethyl}amino]propyl]-2,3-dihydro-1H-indole-7-carbonitrile and hydrolyzing the same, and manufacturing intermediates used therefore.
摘要翻译: 本发明提供了可用于与良性前列腺增生相关的排尿困难的治疗剂的西洛德辛的工业方法生产。 酪氨酸的产生的特征在于将3- {7-氰基-5 - [(2R)-2 - ({(2- [2-(2,2,2-三氟乙氧基) - 苯氧基]乙基}氨基]丙基] -2,3-二氢-1H-吲哚-1-基} - 丙基苯甲酸酯和草酸,得到草酸盐,随后水解草酸盐,得到1-(3-羟基丙基)-5 - [(2R)-2- ({2- [2-(2,2,2-三氟乙氧基)苯氧基]乙基}氨基]丙基] -2,3-二氢-1H-吲哚-7-甲腈并水解,由此制造中间体。
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公开(公告)号:US5063433A
公开(公告)日:1991-11-05
申请号:US508692
申请日:1990-04-13
申请人: Kenji Matsuo , Tadashi Nonaka , Ikuo Tsuchiya
发明人: Kenji Matsuo , Tadashi Nonaka , Ikuo Tsuchiya
IPC分类号: H01L21/3205 , H01L21/60 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/528
CPC分类号: H01L23/5286 , H01L24/05 , H01L24/06 , H01L2224/05554 , H01L2924/3011
摘要: A semiconductor device comprises a first pad region applied with a first potential, a first line led from the first pad region and connected to a first circuit, a second pad region integrated with the first pad region and applied also with the first potential, and a second line led from the second pad region connected to a second circuit and overlapped with the first line.
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