公开(公告)号：US08946806B2

公开(公告)日：2015-02-03

申请号：US13189554

申请日：2011-07-24

申请人： Shyue Seng Tan ,  Eng Huat Toh ,  Elgin Quek ,  Yanzhe Tang

发明人： Shyue Seng Tan ,  Eng Huat Toh ,  Elgin Quek ,  Yanzhe Tang

IPC分类号： H01L29/788 ,  H01L21/336 ,  G11C16/04 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66 ,  H01L27/115

CPC分类号： H01L27/11568 ,  G11C16/04 ,  G11C16/0475 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11526 ,  H01L27/11573 ,  H01L29/42324 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/66825 ,  H01L29/7883

摘要： A device having a substrate prepared with a memory cell region having a memory cell is disclosed. The memory cell includes an access transistor and a storage transistor. The access transistor includes first and second source/drain (S/D) regions and the storage transistor includes first and second storage S/D regions. The access and storage transistors are coupled in series and the second S/D regions being a common S/D region. An erase gate is disposed over the common S/D region. A program gate is disposed over the first storage S/D region. Such an arrangement of the memory cell decouples a program channel and an erase channel.

摘要翻译： 公开了一种具有由具有存储单元的存储单元区制备的衬底的器件。 存储单元包括存取晶体管和存储晶体管。 存取晶体管包括第一和第二源极/漏极（S / D）区域，并且存储晶体管包括第一和第二存储S / D区域。 访问和存储晶体管串联耦合，第二S / D区域是公共S / D区域。 擦除栅极设置在公共S / D区域上。 在第一存储S / D区域上设置有编程门。 存储器单元的这种布置使程序通道和擦除通道分离。