公开(公告)号：US20230333861A1

公开(公告)日：2023-10-19

申请号：US18191074

申请日：2023-03-28

Applicant: SiFive, Inc.

Inventor： Krste Asanovic ,  Paul Walmsley ,  John Ingalls

IPC: G06F9/445

CPC classification number: G06F9/44505

Abstract: A first operating system process may be identified. The first operating system process may have instructions configured to be executed by a processor core. A first set of parameters may be determined based on an attribute of the first operating system process. For example, the first set of parameters may be determined based on an address space identifier, an address space stored in a page table base register, a virtual machine identifier, or a combination thereof. A component of the processor core may be configured using the first set of parameters. For example, one or more components, such as a branch predictor, a prefetcher, a dispatch unit, a vector unit, a clock controller, and the like, may be configured using the first set of parameters.

公开(公告)号：US20240411356A1

公开(公告)日：2024-12-12

申请号：US18744598

申请日：2024-06-15

Applicant: SiFive, Inc.

Inventor： Edward McLellan ,  Arjun Pal Chowdury ,  Paul Walmsley

IPC: G06F1/3237 ,  G06F1/3206

Abstract: Described are systems and methods for clock gating components on a system-on-chip. A processing system includes one or more cores, each core including a clock gating enable bit register which is set by software when an expected idle period of the core meets or exceeds a clock gating threshold, and a power management unit connected to the one or more cores. The power management unit configured to receive an idle notification from a core of the one or more cores and initiate clock gating a clock associated with the core when the core and additional logic is quiescent and the clock gating enable bit register is set. The clock gating threshold is a defined magnitude greater than a clock wake-up time.

公开(公告)号：US20240338219A1

公开(公告)日：2024-10-10

申请号：US18747412

申请日：2024-06-18

Applicant: SiFive, Inc.

Inventor： Paul Walmsley ,  John Ingalls ,  Benoy Alexander

IPC: G06F9/38

CPC classification number: G06F9/3802

Abstract: Disclosed are systems and methods for configuring a prefetcher. A process may reconfigure a prefetcher associated with a processor core responsive to a context switch. The context switch may comprise the processor core changing from executing a first process to a second process. In some implementations, reconfiguring the prefetcher may include updating a register controlling an operation of the prefetcher from a first set of parameters associated with the first process to a second set of parameters associated with the second process. In some implementations, the second set of parameters may be based on input from a process executed in a user mode.