POWER TRANSISTOR DETECTION WITH SELF-PROTECTION

    公开(公告)号:US20210099165A1

    公开(公告)日:2021-04-01

    申请号:US16588777

    申请日:2019-09-30

    Abstract: A method for establishing a powered link over a transmission line includes enabling a current source to provide a constant, predetermined current to a terminal. The method includes sensing a voltage on the terminal to generate a sensed voltage level. The method includes comparing the sensed voltage level on the terminal to a predetermined voltage level. The method includes disabling the current source in response to the sensed voltage level equaling or exceeding the predetermined voltage level. The method may include, while the current source is enabled, a power transistor coupled to the terminal is disabled and only conducts current in a subthreshold region of transistor operation.

    Low-ringing output driver
    5.
    发明授权

    公开(公告)号:US10469075B2

    公开(公告)日:2019-11-05

    申请号:US15610009

    申请日:2017-05-31

    Abstract: A driver circuit has pre-driver and transistor pairs coupled in parallel paths with different delays in different paths allowing the driver to automatically adjust to load conditions, providing a moderate driver with low output ringing for low capacitive loads, while the added delay in the different paths is negligible when driving heavy capacitive loads. The driver circuit automatically scales drive strength of the output driver during switching transients to the load capacitance, providing a good trade-off between fast transient and low output ringing for a variety of different capacitive loads.

    LOW-RINGING OUTPUT DRIVER
    6.
    发明申请

    公开(公告)号:US20180351546A1

    公开(公告)日:2018-12-06

    申请号:US15610009

    申请日:2017-05-31

    Abstract: A driver circuit has pre-driver and transistor pairs coupled in parallel paths with different delays in different paths allowing the driver to automatically adjust to load conditions, providing a moderate driver with low output ringing for low capacitive loads, while the added delay in the different paths is negligible when driving heavy capacitive loads. The driver circuit automatically scales drive strength of the output driver during switching transients to the load capacitance, providing a good trade-off between fast transient and low output ringing for a variety of different capacitive loads.

    Deglitcher circuit with integrated non-overlap function

    公开(公告)号:US11258432B1

    公开(公告)日:2022-02-22

    申请号:US17125561

    申请日:2020-12-17

    Abstract: A driver circuit includes a first deglitcher circuit that delays a rising edge or a falling edge of an input signal according to a mode control signal and supplies a first output signal. A second deglitcher circuit receives the first output signal and delays either a rising edge or a falling edge of the first output signal by a second delay according to the mode control signal and supplies a second output signal. Logic gates combine the first and second output signals to supply gate control signals for output transistors to drive the driver circuit output. A sum of the first delay and the second delay determines the total deglitch time defining a pulse width of pulses that are suppressed by the driver circuit and the second delay determines a non-overlap time. The non-overlap time overlaps in time with the total deglitch time.

    TEST INTERFACE WITH ACCESS ACROSS ISOLATION BARRIER

    公开(公告)号:US20180348295A1

    公开(公告)日:2018-12-06

    申请号:US15609996

    申请日:2017-05-31

    Abstract: An isolation system includes a transmit die and a receive die coupled by an isolation channel. The transmit die receives diagnostic data at an input terminal and transmits the diagnostic data over an isolation channel to a receive die. The receive die supplies a signal from an internal node in the receive die identified by the diagnostic data to an output terminal of the receive die. Other diagnostic data received by the transmit die causes the transmit die to supply a signal from an internal node in the transmit die to a terminal of the transmit die.

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