Abstract:
A low-drop regulator (LDO) apparatus includes an operational amplifier, a buffer stage circuit, and a power transistor. The operational amplifier is used for receiving a reference voltage and a feedback voltage to generate a first voltage. The buffer stage circuit is coupled to the power transistor and the operational amplifier and used for buffering the first voltage to generate a second voltage. The power transistor is coupled to the buffer stage circuit and used for generating an output voltage according to the second voltage wherein the output voltage is proportional to the feedback voltage. In addition, the buffer stage circuit is arranged to determine whether to mirror and generate a mirrored current according to the first voltage and to generate the second voltage for providing the second voltage to the power transistor to control on/off state of the power transistor when the mirrored current is generated.
Abstract:
A low-dropout voltage regulator apparatus includes a voltage source circuit, an error amplifier, an output transistor, a resistor-capacitor circuit, a detection circuit, and a current adjusting circuit. The voltage source circuit generates a reference voltage signal and at least one threshold voltage signal. The error amplifier receives the reference voltage signal and a feedback voltage signal to generate an output control signal. The output transistor provides an output current for the output terminal according to the output control signal. The resistor-capacitor circuit generates the feedback voltage signal using voltage dividing according to a voltage corresponding to the output current. The detection circuit compares at least one threshold voltage signal with the output voltage to generate at least one control voltage signal. The current adjusting circuit adaptively adjusts the current passing though the output transistor to decrease the transient response time according to the at least one control voltage signal.
Abstract:
A low-dropout voltage regulator apparatus includes a voltage source circuit, an error amplifier, an output transistor, a resistor-capacitor circuit, a detection circuit, and a current adjusting circuit. The voltage source circuit generates a reference voltage signal and at least one threshold voltage signal. The error amplifier receives the reference voltage signal and a feedback voltage signal to generate an output control signal. The output transistor provides an output current for the output terminal according to the output control signal. The resistor-capacitor circuit generates the feedback voltage signal using voltage dividing according to a voltage corresponding to the output current. The detection circuit compares at least one threshold voltage signal with the output voltage to generate at least one control voltage signal. The current adjusting circuit adaptively adjusts the current passing though the output transistor to decrease the transient response time according to the at least one control voltage signal.
Abstract:
A differential operational amplifier, which comprises: a voltage adjusting module, coupled between a first predetermined voltage source and a second predetermined voltage source, for adjusting a first voltage via a first voltage adjusting value to generate a first adjusted voltage, and for adjusting a second voltage via a second voltage adjusting value to generate a second adjusted voltage, wherein the first voltage adjusting value and the second voltage adjusting value change corresponding to a temperature; and a differential signal computing module, coupled between the first predetermined voltage source and the second predetermined voltage source, for generating an output voltage according the first adjusted voltage and the second adjusted voltage.
Abstract:
A differential operational amplifier, which comprises: a voltage adjusting module, coupled between a first predetermined voltage source and a second predetermined voltage source, for adjusting a first voltage via a first voltage adjusting value to generate a first adjusted voltage, and for adjusting a second voltage via a second voltage adjusting value to generate a second adjusted voltage, wherein the first voltage adjusting value and the second voltage adjusting value change corresponding to a temperature; and a differential signal computing module, coupled between the first predetermined voltage source and the second predetermined voltage source, for generating an output voltage according the first adjusted voltage and the second adjusted voltage.
Abstract:
A bandgap reference voltage generating circuit, comprising: a current mirror, for respectively generating a first, a second and a third currents at a first, a second and a third current output terminals; a first OP; an input voltage generating module, for respectively generating a first, a second voltages at a first, a second operational input terminals of the first OP according to the first, second currents, wherein the first OP generates a control voltage to the current mirror according to the first, second voltages; and a voltage keeping module, comprising a first current receiving terminal for receiving the third current to generate a third voltage, and a reference voltage generating terminal coupled to a reference voltage resistance device and for generating a reference voltage according to the third current. The voltage keeping module controls the third voltage to be the same as the first or the second voltage.
Abstract:
A low-drop regulator (LDO) apparatus includes an operational amplifier, a buffer stage circuit, and a power transistor. The operational amplifier is used for receiving a reference voltage and a feedback voltage to generate a first voltage. The buffer stage circuit is coupled to the power transistor and the operational amplifier and used for buffering the first voltage to generate a second voltage. The power transistor is coupled to the buffer stage circuit and used for generating an output voltage according to the second voltage wherein the output voltage is proportional to the feedback voltage. In addition, the buffer stage circuit is arranged to determine whether to mirror and generate a mirrored current according to the first voltage and to generate the second voltage for providing the second voltage to the power transistor to control on/off state of the power transistor when the mirrored current is generated.