公开(公告)号：US20160148873A1

公开(公告)日：2016-05-26

申请号：US14833586

申请日：2015-08-24

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Ching-Wen Chiang ,  Hsien-Wen Chen ,  Kuang-Hsin Chen ,  Chung-Chih Yen ,  Wei-Jen Chang

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/768

CPC classification number: H01L23/5384 ,  H01L23/147 ,  H01L23/15 ,  H01L23/5389 ,  H01L24/00 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: A method for fabricating an electronic package is provided, which includes the steps of: providing a substrate having a cavity and a first via hole; disposing an electronic element in the cavity; forming a dielectric layer on the substrate and the electronic element; forming a circuit layer on the dielectric layer and forming a first conductive portion in the first via hole; forming on the substrate a second via hole communicating with the first via hole, the first and second via holes constituting a through hole; and forming a second conductive portion in the second via hole, the first and second conductive portions constituting a conductor. Since the through hole is formed through a two-step process, the invention can reduce the depth of the via holes and therefore perform laser drilling or etching processes with reduced energy, thereby avoiding damage of the conductive portions and improving the product reliability.

Abstract translation: 提供一种制造电子封装的方法，其包括以下步骤：提供具有空腔和第一通孔的基板; 将电子元件放置在空腔中; 在所述基板和所述电子元件上形成介电层; 在所述电介质层上形成电路层，并在所述第一通孔中形成第一导电部分; 在所述基板上形成与所述第一通孔连通的第二通孔，所述第一通孔和第二通孔构成通孔; 以及在所述第二通孔中形成第二导电部分，所述第一和第二导电部分构成导体。 由于通孔是通过两步法形成的，所以本发明可以减小通孔的深度，从而能够以较低的能量进行激光打孔或蚀刻处理，从而避免导电部的损坏，提高产品的可靠性。