公开(公告)号：US09196596B2

公开(公告)日：2015-11-24

申请号：US14013469

申请日：2013-08-29

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Ching-Wen Chiang ,  Kuang-Hsin Chen ,  Wei-Jen Chang ,  Hsien-Wen Chen

IPC: H01L23/00

CPC classification number: H01L24/14 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/64 ,  H01L24/67 ,  H01L2924/15788 ,  H01L2924/00

Abstract: A method of manufacturing an interposer is provided, including forming a plurality of first openings on one surface side of a substrate, forming a first metal layer in the first openings, forming on the other surface side of the substrate a plurality of second openings that are in communication with the first openings, forming a second metal layer in the second openings, and electrically connecting the first metal layer to the second metal layer, so as to form conductive through holes. The conductive through holes are formed stage by stage, such that the fabrication time in forming the metal layers is reduced, and a metal material will not be accumulated too thick on a surface of the substrate. Therefore, the metal material has a smoother surface, and no overburden will be formed around end surfaces of the through holes. An interposer is also provided.

Abstract translation: 提供一种制造插入件的方法，包括在基板的一个表面侧上形成多个第一开口，在第一开口中形成第一金属层，在基板的另一表面侧上形成多个第二开口， 与所述第一开口连通，在所述第二开口中形成第二金属层，并且将所述第一金属层电连接到所述第二金属层，以形成导电通孔。 导电通孔逐级形成，使得形成金属层的制造时间减少，并且金属材料在基板的表面上不会太累积。 因此，金属材料具有更平滑的表面，并且在通孔的端面周围不会形成覆盖层。 还提供了插入器。

公开(公告)号：US20160148873A1

公开(公告)日：2016-05-26

申请号：US14833586

申请日：2015-08-24

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Ching-Wen Chiang ,  Hsien-Wen Chen ,  Kuang-Hsin Chen ,  Chung-Chih Yen ,  Wei-Jen Chang

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/768

CPC classification number: H01L23/5384 ,  H01L23/147 ,  H01L23/15 ,  H01L23/5389 ,  H01L24/00 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/3511 ,  H01L2924/37001

Abstract: A method for fabricating an electronic package is provided, which includes the steps of: providing a substrate having a cavity and a first via hole; disposing an electronic element in the cavity; forming a dielectric layer on the substrate and the electronic element; forming a circuit layer on the dielectric layer and forming a first conductive portion in the first via hole; forming on the substrate a second via hole communicating with the first via hole, the first and second via holes constituting a through hole; and forming a second conductive portion in the second via hole, the first and second conductive portions constituting a conductor. Since the through hole is formed through a two-step process, the invention can reduce the depth of the via holes and therefore perform laser drilling or etching processes with reduced energy, thereby avoiding damage of the conductive portions and improving the product reliability.

Abstract translation: 提供一种制造电子封装的方法，其包括以下步骤：提供具有空腔和第一通孔的基板; 将电子元件放置在空腔中; 在所述基板和所述电子元件上形成介电层; 在所述电介质层上形成电路层，并在所述第一通孔中形成第一导电部分; 在所述基板上形成与所述第一通孔连通的第二通孔，所述第一通孔和第二通孔构成通孔; 以及在所述第二通孔中形成第二导电部分，所述第一和第二导电部分构成导体。 由于通孔是通过两步法形成的，所以本发明可以减小通孔的深度，从而能够以较低的能量进行激光打孔或蚀刻处理，从而避免导电部的损坏，提高产品的可靠性。