公开(公告)号：US20230058077A1

公开(公告)日：2023-02-23

申请号：US17880417

申请日：2022-08-03

Applicant: Socionext Inc.

Inventor： Sandeep SANTHOSH KUMAR ,  Jayaraman KUMAR ,  Armin JALILI SEBARDAN ,  Martin WILSON

IPC: H03M1/06

Abstract: Analogue-to-digital converter, ADC, circuitry comprising: successive-approximation circuitry configured in a subconversion operation to draw a charge from a first voltage reference, REF1; compensation circuitry comprising at least one compensation capacitor and configured, in a precharge operation prior to the subconversion operation, to connect the at least one compensation capacitor so that the at least one compensation capacitor stores a compensation charge, and, in the subconversion operation, to connect the at least one compensation capacitor to the first voltage reference so that a charge is injected into the first voltage reference, REF1; and control circuitry, wherein: the successive-approximation circuitry and the compensation circuitry are configured such that one or more parameters defining at least one of said charges are controllable; and the control circuitry is configured to adjust at least one said parameter to adjust an extent to which the charge injected into the first voltage reference, REF1, by the compensation circuitry compensates for the charge drawn from the first voltage reference, REF1, by the successive-approximation circuitry.

公开(公告)号：US20220239265A1

公开(公告)日：2022-07-28

申请号：US17716725

申请日：2022-04-08

Applicant: SOCIONEXT INC.

Inventor： Armin JALILI SEBARDAN ,  Alistair John GRATREX

IPC: H03F3/45 ,  H03F1/32

Abstract: Differential amplifier circuitry including: first and second main transistors of a given conductivity type; and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.

公开(公告)号：US20220407535A1

公开(公告)日：2022-12-22

申请号：US17837615

申请日：2022-06-10

Applicant: Socionext Inc.

Inventor： Vlad CRETU ,  Armin JALILI SEBARDAN

IPC: H03M1/12 ,  H03K17/54

Abstract: A sampling switch circuit, comprising an input node, connected to receive an input voltage signal, a sampling transistor comprising a gate terminal, a source terminal and a drain terminal, the source terminal connected to the input node, a hold-control node connected to receive a hold-control voltage signal, an output node connected to the drain terminal of the sampling transistor, a buffer circuit having a buffer input connected to the input node and a buffer output connected to a track-control node, the buffer circuit configured to provide a track-control voltage signal at the track-control node dependent on the input voltage signal and switching circuitry configured to connect the gate terminal of the sampling transistor to the track-control node or to the hold-control node in dependence upon a clock signal.

公开(公告)号：US20210258016A1

公开(公告)日：2021-08-19

申请号：US17173053

申请日：2021-02-10

Applicant: SOCIONEXT INC.

Inventor： Armin JALILI SEBARDAN ,  Alistair John GRATREX ,  Mojtaba BAGHERI

IPC: H03M1/12

Abstract: A sampling switch circuit, comprising: an input node, connected to receive an input voltage signal to be sampled; a sampling transistor comprising a gate terminal, a source terminal and a drain terminal, the source terminal connected to the input node; a potential divider circuit connected to the input node and a track-control node to provide a track-control voltage signal dependent on the input voltage signal at the track-control node; a hold-control node connected to receive a hold-control voltage signal; an output node connected to the drain terminal of the sampling transistor; and switching circuitry configured to connect the gate terminal of the sampling transistor to the track-control node or to the hold-control node in dependence upon a clock signal.

公开(公告)号：US20210194432A1

公开(公告)日：2021-06-24

申请号：US17115349

申请日：2020-12-08

Applicant: SOCIONEXT INC.

Inventor： Armin JALILI SEBARDAN

IPC: H03D7/14

Abstract: Differential mixer circuitry comprising: first and second input-voltage nodes and first and second input-current nodes; a passive network of impedances connected between the first and second input-voltage nodes and the first and second input-current nodes, and configured to convert first and second input-voltage signals received at the first and second input-voltage nodes, respectively, into first and second input-current signals provided at the first and second input-current nodes, respectively, the first and second input-voltage signals defining a differential input-voltage signal having an input frequency, and the first and second input-current signals defining a differential input-current signal; and a mixing stage configured to mix the differential input-current signal with at least one mixing signal having a corresponding mixing frequency and output a differential output signal having an output frequency dependent on the input frequency and each mixing frequency.