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公开(公告)号：US07902620B2
公开(公告)日：2011-03-08
申请号：US12191687
申请日：2008-08-14
申请人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurii A. Vlasov , Ying Zhang
发明人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurii A. Vlasov , Ying Zhang
IPC分类号： H01L31/18
CPC分类号： H01L31/1804 , B82Y20/00 , G02B6/12004 , G02B6/136 , G02B2006/12123 , H01L31/109 , H01L31/1812 , Y02E10/547 , Y02P70/521
摘要： A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.
摘要翻译： 在第一外延硅层的顶表面上外延地形成第一硅锗合金层，第二外延硅层，第二硅锗层和锗层的垂直叠层。 第二外延硅层，第二硅锗层和锗层通过介电盖部分，电介质间隔物和第一硅锗层被图案化和封装。 在第一和第二硅层之间移除硅锗层以形成硅锗台面结构，其结构上支撑包括硅部分，硅锗合金部分，锗光电检测器和介电帽部分的叠层的悬垂结构。 锗光电探测器由硅锗台面结构悬挂而不邻接硅波导。 锗扩散到硅波导和锗检测器中的缺陷密度被最小化。
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公开(公告)号：US20100038736A1
公开(公告)日：2010-02-18
申请号：US12191687
申请日：2008-08-14
申请人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurii A. Vlasov , Ying Zhang
发明人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurii A. Vlasov , Ying Zhang
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L31/1804 , B82Y20/00 , G02B6/12004 , G02B6/136 , G02B2006/12123 , H01L31/109 , H01L31/1812 , Y02E10/547 , Y02P70/521
摘要： A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.
摘要翻译： 在第一外延硅层的顶表面上外延地形成第一硅锗合金层，第二外延硅层，第二硅锗层和锗层的垂直叠层。 第二外延硅层，第二硅锗层和锗层通过介电盖部分，电介质间隔物和第一硅锗层被图案化和封装。 在第一和第二硅层之间去除硅锗层以形成硅锗台面结构，其结构上支撑包括硅部分，硅锗合金部分，锗光电检测器和介电帽部分的叠层的悬垂结构。 锗光电探测器由硅锗台面结构悬挂而不邻接硅波导。 锗扩散到硅波导和锗检测器中的缺陷密度被最小化。
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公开(公告)号：US20110143482A1
公开(公告)日：2011-06-16
申请号：US13005821
申请日：2011-01-13
申请人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurri A. Vlasov , Ying Zhang
发明人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurri A. Vlasov , Ying Zhang
IPC分类号： H01L31/18
CPC分类号： H01L31/1804 , B82Y20/00 , G02B6/12004 , G02B6/136 , G02B2006/12123 , H01L31/109 , H01L31/1812 , Y02E10/547 , Y02P70/521
摘要： A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.
摘要翻译： 在第一外延硅层的顶表面上外延地形成第一硅锗合金层，第二外延硅层，第二硅锗层和锗层的垂直叠层。 第二外延硅层，第二硅锗层和锗层通过介电盖部分，电介质间隔物和第一硅锗层被图案化和封装。 在第一和第二硅层之间去除硅锗层以形成硅锗台面结构，其结构上支撑包括硅部分，硅锗合金部分，锗光电检测器和介电帽部分的叠层的悬垂结构。 锗光电探测器由硅锗台面结构悬挂而不邻接硅波导。 锗扩散到硅波导和锗检测器中的缺陷密度被最小化。
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公开(公告)号：US08178382B2
公开(公告)日：2012-05-15
申请号：US13005821
申请日：2011-01-13
申请人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurri A. Vlasov , Ying Zhang
发明人： Solomon Assefa , Jack O. Chu , Martin M. Frank , William M. Green , Young-hee Kim , George G. Totir , Joris Van Campenhout , Yurri A. Vlasov , Ying Zhang
IPC分类号： H01L31/18
CPC分类号： H01L31/1804 , B82Y20/00 , G02B6/12004 , G02B6/136 , G02B2006/12123 , H01L31/109 , H01L31/1812 , Y02E10/547 , Y02P70/521
摘要： A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.
摘要翻译： 在第一外延硅层的顶表面上外延地形成第一硅锗合金层，第二外延硅层，第二硅锗层和锗层的垂直叠层。 第二外延硅层，第二硅锗层和锗层通过介电盖部分，电介质间隔物和第一硅锗层被图案化和封装。 在第一和第二硅层之间去除硅锗层以形成硅锗台面结构，其结构上支撑包括硅部分，硅锗合金部分，锗光电检测器和介电帽部分的叠层的悬垂结构。 锗光电探测器由硅锗台面结构悬挂而不邻接硅波导。 锗扩散到硅波导和锗检测器中的缺陷密度被最小化。
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公开(公告)号：US20120125916A1
公开(公告)日：2012-05-24
申请号：US13363995
申请日：2012-02-01
IPC分类号： H05B6/02 , H01L21/329 , H01L29/66
CPC分类号： H01L35/34 , G02B6/12004 , G02B6/1347 , G02B2006/12069 , G02F1/0147 , G02F1/025
摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.
摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。
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公开(公告)号：US20110007761A1
公开(公告)日：2011-01-13
申请号：US12498463
申请日：2009-07-07
CPC分类号： H01L35/34 , G02B6/12004 , G02B6/1347 , G02B2006/12069 , G02F1/0147 , G02F1/025
摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.
摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。
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公开(公告)号：US08111724B2
公开(公告)日：2012-02-07
申请号：US12498463
申请日：2009-07-07
IPC分类号： H01S5/00
CPC分类号： H01L35/34 , G02B6/12004 , G02B6/1347 , G02B2006/12069 , G02F1/0147 , G02F1/025
摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.
摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。
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公开(公告)号：US08363686B2
公开(公告)日：2013-01-29
申请号：US13363995
申请日：2012-02-01
IPC分类号： H01S5/00
CPC分类号： H01L35/34 , G02B6/12004 , G02B6/1347 , G02B2006/12069 , G02F1/0147 , G02F1/025
摘要： Current may be passed through an n-doped semiconductor region, a recessed metal semiconductor alloy portion, and a p-doped semiconductor region so that the diffusion of majority charge carriers in the doped semiconductor regions transfers heat from or into the semiconductor waveguide through Peltier-Seebeck effect. Further, a temperature control device may be configured to include a metal semiconductor alloy region located in proximity to an optoelectronic device, a first semiconductor region having a p-type doping, and a second semiconductor region having an n-type doping. The temperature of the optoelectronic device may thus be controlled to stabilize the performance of the optoelectronic device.
摘要翻译： 电流可以通过n掺杂半导体区域，凹陷金属半导体合金部分和p掺杂半导体区域，使得掺杂半导体区域中的多数电荷载流子的扩散通过Peltier- 塞贝克效应。 此外，温度控制装置可以被配置为包括位于光电子器件附近的金属半导体合金区域，具有p型掺杂的第一半导体区域和具有n型掺杂的第二半导体区域。 因此可以控制光电子器件的温度以稳定光电器件的性能。
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公开(公告)号：US20100111470A1
公开(公告)日：2010-05-06
申请号：US12265938
申请日：2008-11-06
IPC分类号： G02B6/26
CPC分类号： G02F1/3136 , G02F1/2257 , G02F2001/0151 , G02F2001/311
摘要： An optical switch includes a plurality of optical interferometric structures is serially connected between at least one optical input node and two optical output nodes. A primary waveguide directly connects an optical input node and a first optical output node. A complementary waveguide, which is directly connected to a second optical output node, is evanescently coupled with the primary waveguide in a pair of optically coupled sections provided in each optical interferometric structure. Each optical interferometric structure also includes a pair of decoupled sections, which includes a primary decoupled section embedding a portion of the primary waveguide and a complementary decoupled section which includes a portion of the complementary waveguide. The complementary decoupled section is embedded in a phase tuning structure that allows modulation of the phase of the optical signal passing through. The optical switch provides less insertion loss, less crosstalk, and wider bandwidth than prior art optical switches.
摘要翻译： 光开关包括多个光学干涉结构串联连接在至少一个光输入节点和两个光输出节点之间。 主波导直接连接光输入节点和第一光输出节点。 直接连接到第二光输出节点的互补波导与设置在每个光学干涉结构中的一对光耦合部分中的主波导ev逝地耦合。 每个光学干涉结构还包括一对解耦部分，其包括嵌入主波导的一部分的初级去耦部分和包括互补波导的一部分的互补去耦部分。 互补解耦部分被嵌入相位调谐结构中，允许调制通过的光信号的相位。 与现有技术的光开关相比，光开关提供较少的插入损耗，较少的串扰和更宽的带宽。
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10.发明授权Fabrication of a localized thick box with planar oxide/SOI interface on bulk silicon substrate for silicon photonics integration 失效在硅硅衬底上制造具有平面氧化物/ SOI界面的局部厚盒，用于硅光子学集成公开(公告)号：US08772902B2
公开(公告)日：2014-07-08
申请号：US13451141
申请日：2012-04-19
IPC分类号： H01L21/70
CPC分类号： G02B6/13 , H01L21/76232 , H01L21/76289
摘要： Line trenches are formed in a stack of a bulk semiconductor substrate and an oxygen-impermeable layer such that the depth of the trenches in the bulk semiconductor substrate is greater than the lateral spacing between a pair of adjacently located line trenches. Oxygen-impermeable spacers are formed on sidewalls of the line trenches. An isotropic etch, either alone or in combination with oxidation, removes a semiconductor material from below the oxygen-impermeable spacers to expand the lateral extent of expanded-bottom portions of the line trenches, and to reduce the lateral spacing between adjacent expanded-bottom portions. The semiconductor material around the bottom portions is oxidized to form a semiconductor oxide portion that underlies multiple oxygen-impermeable spacers. Semiconductor-on-insulator (SOI) portions are formed above the semiconductor oxide portion and within the bulk semiconductor substrate.
摘要翻译： 线槽形成在体半导体衬底和不透氧层的堆叠中，使得体半导体衬底中的沟槽的深度大于一对相邻定位的线沟槽之间的横向间隔。 不透水间隔物形成在线沟槽的侧壁上。 单独或与氧化组合的各向同性蚀刻从氧不透性间隔物的下面去除半导体材料，以扩大线沟槽的扩展底部的横向范围，并且减小相邻扩展底部之间的横向间隔 。 底部周围的半导体材料被氧化以形成在多个不透氧隔离物下面的半导体氧化物部分。 半导体绝缘体（SOI）部分形成在半导体氧化物部分之上和体半导体衬底内。
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